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[PATCH v2 05/27] target/ppc: cpu_init: Avoid nested SPR register functio
From: |
Fabiano Rosas |
Subject: |
[PATCH v2 05/27] target/ppc: cpu_init: Avoid nested SPR register functions |
Date: |
Wed, 16 Feb 2022 13:24:04 -0300 |
Make sure that every register_*_sprs function only has calls to
spr_register* to register individual SPRs. Do not allow nesting. This
makes the code easier to follow and a look at init_proc_* should
suffice to know what SPRs a CPU has.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/cpu_init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index b7e460e12d..1eef006a04 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -1128,8 +1128,6 @@ static void register_BookE206_sprs(CPUPPCState *env,
uint32_t mas_mask,
break;
}
#endif
-
- register_usprgh_sprs(env);
}
/* SPR specific to PowerPC 440 implementation */
@@ -1427,7 +1425,6 @@ static void register_405_sprs(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
spr_read_generic, &spr_write_generic,
0x00000000);
- register_usprgh_sprs(env);
}
@@ -2322,6 +2319,7 @@ static void init_proc_405(CPUPPCState *env)
{
register_40x_sprs(env);
register_405_sprs(env);
+ register_usprgh_sprs(env);
/* Bus access control */
/* not emulated, as QEMU never does speculative access */
spr_register(env, SPR_40x_SGR, "SGR",
@@ -2951,6 +2949,7 @@ static void init_proc_e200(CPUPPCState *env)
0x00000000);
/* Memory management */
register_BookE206_sprs(env, 0x0000005D, NULL, 0);
+ register_usprgh_sprs(env);
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
@@ -3298,6 +3297,7 @@ static void init_proc_e500(CPUPPCState *env, int version)
env->spr[SPR_PVR]);
}
register_BookE206_sprs(env, 0x000000DF, tlbncfg, mmucfg);
+ register_usprgh_sprs(env);
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
--
2.34.1
- [PATCH v2 00/27] target/ppc: SPR registration cleanups, Fabiano Rosas, 2022/02/16
- [PATCH v2 03/27] target/ppc: cpu_init: Group registration of generic SPRs, Fabiano Rosas, 2022/02/16
- [PATCH v2 01/27] target/ppc: cpu_init: Remove not implemented comments, Fabiano Rosas, 2022/02/16
- [PATCH v2 04/27] target/ppc: cpu_init: Move Timebase registration into the common function, Fabiano Rosas, 2022/02/16
- [PATCH v2 05/27] target/ppc: cpu_init: Avoid nested SPR register functions,
Fabiano Rosas <=
- [PATCH v2 09/27] target/ppc: cpu_init: Decouple 74xx SPR registration from 7xx, Fabiano Rosas, 2022/02/16
- [PATCH v2 07/27] target/ppc: cpu_init: Move G2 SPRs into register_G2_sprs, Fabiano Rosas, 2022/02/16
- [PATCH v2 02/27] target/ppc: cpu_init: Remove G2LE init code, Fabiano Rosas, 2022/02/16
- [PATCH v2 08/27] target/ppc: cpu_init: Decouple G2 SPR registration from 755, Fabiano Rosas, 2022/02/16
- [PATCH v2 10/27] target/ppc: cpu_init: Deduplicate 440 SPR registration, Fabiano Rosas, 2022/02/16
- [PATCH v2 06/27] target/ppc: cpu_init: Move 405 SPRs into register_405_sprs, Fabiano Rosas, 2022/02/16
- [PATCH v2 11/27] target/ppc: cpu_init: Deduplicate 603 SPR registration, Fabiano Rosas, 2022/02/16
- [PATCH v2 15/27] target/ppc: cpu_init: Move 755 L2 cache SPRs into a function, Fabiano Rosas, 2022/02/16
- [PATCH v2 12/27] target/ppc: cpu_init: Deduplicate 604 SPR registration, Fabiano Rosas, 2022/02/16
- [PATCH v2 13/27] target/ppc: cpu_init: Deduplicate 745/755 SPR registration, Fabiano Rosas, 2022/02/16