Re: [PATCH v6 3/4] tests/tcg/s390x: Tests for Miscellaneous-Instruction-Extensions Facility 3

[David Miller]

> No test for popcnt, seeing as there's a bug in m3?

Originally popcnt was not in the task list, it was added later.

> You can't split these two asm, lest the ltgr and sel not be adjacent, and the 
> flags not
> having the correct value when we arrive at the sel.

This was tested, both gcc and clang assemble multiple 'asm' statements
into a single block as long as there are no C statements between.
I'm happy to change it.

On Wed, Feb 23, 2022 at 2:45 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 2/17/22 13:17, David Miller wrote:
> > +#define F_PRO    asm ( \
> > +    "lg %%r2, %[a]\n"  \
> > +    "lg %%r3, %[b]\n"  \
> > +    "lg %%r0, %[c]\n"  \
> > +    "ltgr %%r0, %%r0"  \
> > +    : : [a] "m" (a),   \
> > +        [b] "m" (b),   \
> > +        [c] "m" (c)    \
> > +    : "r0", "r2", "r3", "r4")
> > +
> > +
> > +
> > +#define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \
> > +{ uint64_t res = 0; F_PRO ; ASM ; return res; }
> > +
> > +
> > +Fi3 (_selre,     asm("selre    %%r0, %%r3, %%r2\n" F_EPI))
> > +Fi3 (_selgrz,    asm("selgrz   %%r0, %%r3, %%r2\n" F_EPI))
> > +Fi3 (_selfhrnz,  asm("selfhrnz %%r0, %%r3, %%r2\n" F_EPI))
>
> You can't split these two asm, lest the ltgr and sel not be adjacent, and the 
> flags not
> having the correct value when we arrive at the sel.
>
> No test for popcnt, seeing as there's a bug in m3?
>
>
> r~