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[RFC PATCH v6 12/29] target/loongarch: Add timer related instructions su
From: |
Xiaojuan Yang |
Subject: |
[RFC PATCH v6 12/29] target/loongarch: Add timer related instructions support. |
Date: |
Fri, 25 Feb 2022 03:02:51 -0500 |
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/helper.h | 1 +
target/loongarch/insn_trans/trans_extra.c.inc | 32 +++++++++++++++++++
target/loongarch/op_helper.c | 6 ++++
target/loongarch/translate.c | 2 ++
4 files changed, 41 insertions(+)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index c916f2650b..035bd141ed 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -116,4 +116,5 @@ DEF_HELPER_4(lddir, tl, env, tl, tl, i32)
DEF_HELPER_4(ldpte, void, env, tl, tl, i32)
DEF_HELPER_1(ertn, void, env)
DEF_HELPER_1(idle, void, env)
+DEF_HELPER_1(rdtime_d, i64, env)
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/loongarch/insn_trans/trans_extra.c.inc
b/target/loongarch/insn_trans/trans_extra.c.inc
index 2ce95d3382..8d3425ba61 100644
--- a/target/loongarch/insn_trans/trans_extra.c.inc
+++ b/target/loongarch/insn_trans/trans_extra.c.inc
@@ -33,22 +33,54 @@ static bool trans_asrtgt_d(DisasContext *ctx, arg_asrtgt_d
* a)
return true;
}
+#ifndef CONFIG_USER_ONLY
+static bool gen_rdtime(DisasContext *ctx, arg_rr *a,
+ bool word, bool high)
+{
+ TCGv dst1 = gpr_dst(ctx, a->rd, EXT_NONE);
+ TCGv dst2 = gpr_dst(ctx, a->rj, EXT_NONE);
+
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
+ gen_helper_rdtime_d(dst1, cpu_env);
+ if (word) {
+ tcg_gen_sextract_tl(dst1, dst1, high ? 32 : 0, 32);
+ }
+ tcg_gen_ld_i64(dst2, cpu_env, offsetof(CPULoongArchState, CSR_TID));
+
+ return true;
+}
+#endif
+
static bool trans_rdtimel_w(DisasContext *ctx, arg_rdtimel_w *a)
{
+#ifdef CONFIG_USER_ONLY
tcg_gen_movi_tl(cpu_gpr[a->rd], 0);
return true;
+#else
+ return gen_rdtime(ctx, a, 1, 0);
+#endif
}
static bool trans_rdtimeh_w(DisasContext *ctx, arg_rdtimeh_w *a)
{
+#ifdef CONFIG_USER_ONLY
tcg_gen_movi_tl(cpu_gpr[a->rd], 0);
return true;
+#else
+ return gen_rdtime(ctx, a, 1, 1);
+#endif
}
static bool trans_rdtime_d(DisasContext *ctx, arg_rdtime_d *a)
{
+#ifdef CONFIG_USER_ONLY
tcg_gen_movi_tl(cpu_gpr[a->rd], 0);
return true;
+#else
+ return gen_rdtime(ctx, a, 0, 0);
+#endif
}
static bool trans_cpucfg(DisasContext *ctx, arg_cpucfg *a)
diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
index 84175fbdcd..7330014308 100644
--- a/target/loongarch/op_helper.c
+++ b/target/loongarch/op_helper.c
@@ -128,4 +128,10 @@ void helper_idle(CPULoongArchState *env)
cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE);
do_raise_exception(env, EXCP_HLT, 0);
}
+
+uint64_t helper_rdtime_d(CPULoongArchState *env)
+{
+ LoongArchCPU *cpu = LOONGARCH_CPU(env_cpu(env));
+ return cpu_loongarch_get_constant_timer_counter(cpu);
+}
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
index c1cac2f006..9ce003980d 100644
--- a/target/loongarch/translate.c
+++ b/target/loongarch/translate.c
@@ -25,6 +25,8 @@ static TCGv cpu_lladdr, cpu_llval;
TCGv_i32 cpu_fcsr0;
TCGv_i64 cpu_fpr[32];
+#include "exec/gen-icount.h"
+
#define DISAS_STOP DISAS_TARGET_0
#define DISAS_EXIT DISAS_TARGET_1
--
2.27.0
- [RFC PATCH v6 11/29] target/loongarch: Add LoongArch interrupt and exception handle, (continued)
- [RFC PATCH v6 11/29] target/loongarch: Add LoongArch interrupt and exception handle, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 09/29] target/loongarch: Add TLB instruction support, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 18/29] hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI), Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 23/29] hw/loongarch: Add LoongArch ls7a rtc device support, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 01/29] target/loongarch: Add system emulation introduction, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 03/29] target/loongarch: Add basic vmstate description of CPU., Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 13/29] target/loongarch: Add gdb support., Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 22/29] hw/loongarch: Add some devices support for 3A5000., Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 15/29] hw/loongarch: Add LoongArch cpu interrupt support(CPUINTC), Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 29/29] tests/tcg/loongarch64: Add hello/memory test in loongarch64 system, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 12/29] target/loongarch: Add timer related instructions support.,
Xiaojuan Yang <=
- [RFC PATCH v6 28/29] hw/loongarch: Add fdt support., Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 16/29] hw/loongarch: Add LoongArch ipi interrupt support(IPI), Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 10/29] target/loongarch: Add other core instructions support, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 26/29] hw/loongarch: Add LoongArch smbios support, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 08/29] target/loongarch: Add LoongArch IOCSR instruction, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 04/29] target/loongarch: Implement qmp_query_cpu_definitions(), Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 21/29] Enable common virtio pci support for LoongArch, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 05/29] target/loongarch: Add constant timer support, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 25/29] hw/loongarch: Add -kernel and -initrd options support, Xiaojuan Yang, 2022/02/25
- [RFC PATCH v6 20/29] hw/loongarch: Add irq hierarchy for the system, Xiaojuan Yang, 2022/02/25