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[PATCH v3 1/8] x86: Fix the 64-byte boundary enumeration for extended st
From: |
Yang Zhong |
Subject: |
[PATCH v3 1/8] x86: Fix the 64-byte boundary enumeration for extended state |
Date: |
Mon, 28 Feb 2022 00:05:08 -0800 |
From: Jing Liu <jing2.liu@intel.com>
The extended state subleaves (EAX=0Dh, ECX=n, n>1).ECX[1]
indicate whether the extended state component locates
on the next 64-byte boundary following the preceding state
component when the compacted format of an XSAVE area is
used.
Right now, they are all zero because no supported component
needed the bit to be set, but the upcoming AMX feature will
use it. Fix the subleaves value according to KVM's supported
cpuid.
Signed-off-by: Jing Liu <jing2.liu@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
---
target/i386/cpu.h | 6 ++++++
target/i386/cpu.c | 1 +
target/i386/kvm/kvm-cpu.c | 1 +
3 files changed, 8 insertions(+)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e69ab5dd78..7bd9d58505 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -550,6 +550,11 @@ typedef enum X86Seg {
#define XSTATE_Hi16_ZMM_MASK (1ULL << XSTATE_Hi16_ZMM_BIT)
#define XSTATE_PKRU_MASK (1ULL << XSTATE_PKRU_BIT)
+#define ESA_FEATURE_ALIGN64_BIT 1
+
+#define ESA_FEATURE_ALIGN64_MASK (1U << ESA_FEATURE_ALIGN64_BIT)
+
+
/* CPUID feature words */
typedef enum FeatureWord {
FEAT_1_EDX, /* CPUID[1].EDX */
@@ -1356,6 +1361,7 @@ QEMU_BUILD_BUG_ON(sizeof(XSavePKRU) != 0x8);
typedef struct ExtSaveArea {
uint32_t feature, bits;
uint32_t offset, size;
+ uint32_t ecx;
} ExtSaveArea;
#define XSAVE_STATE_AREA_COUNT (XSTATE_PKRU_BIT + 1)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6c7ef1099b..0f3c477dfc 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5488,6 +5488,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
const ExtSaveArea *esa = &x86_ext_save_areas[count];
*eax = esa->size;
*ebx = esa->offset;
+ *ecx = esa->ecx & ESA_FEATURE_ALIGN64_MASK;
}
}
break;
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index d95028018e..ce27d3b1df 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -104,6 +104,7 @@ static void kvm_cpu_xsave_init(void)
if (sz != 0) {
assert(esa->size == sz);
esa->offset = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EBX);
+ esa->ecx = kvm_arch_get_supported_cpuid(s, 0xd, i, R_ECX);
}
}
}
- [PATCH v3 0/8] AMX support in Qemu, Yang Zhong, 2022/02/28
- [PATCH v3 2/8] x86: Add AMX XTILECFG and XTILEDATA components, Yang Zhong, 2022/02/28
- [PATCH v3 1/8] x86: Fix the 64-byte boundary enumeration for extended state,
Yang Zhong <=
- [PATCH v3 3/8] x86: Grant AMX permission for guest, Yang Zhong, 2022/02/28
- [PATCH v3 4/8] x86: Add XFD faulting bit for state components, Yang Zhong, 2022/02/28
- [PATCH v3 8/8] linux-header: Sync the linux headers, Yang Zhong, 2022/02/28
- [PATCH v3 5/8] x86: Add AMX CPUIDs enumeration, Yang Zhong, 2022/02/28
- [PATCH v3 7/8] x86: Support XFD and AMX xsave data migration, Yang Zhong, 2022/02/28
- [PATCH v3 6/8] x86: Add support for KVM_CAP_XSAVE2 and AMX state migration, Yang Zhong, 2022/02/28