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[PULL 33/87] target/ppc: implement vrlqmi
From: |
Cédric Le Goater |
Subject: |
[PULL 33/87] target/ppc: implement vrlqmi |
Date: |
Wed, 2 Mar 2022 12:07:09 +0100 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225210936.1749575-28-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/insn32.decode | 1 +
target/ppc/translate/vmx-impl.c.inc | 21 +++++++++++++++++----
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 87d482c5d961..abc2007129d9 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -495,6 +495,7 @@ VRLQ 000100 ..... ..... ..... 00000000101 @VX
VRLWMI 000100 ..... ..... ..... 00010000101 @VX
VRLDMI 000100 ..... ..... ..... 00011000101 @VX
+VRLQMI 000100 ..... ..... ..... 00001000101 @VX
VRLWNM 000100 ..... ..... ..... 00110000101 @VX
VRLDNM 000100 ..... ..... ..... 00111000101 @VX
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index eb305e84da9a..352250fad087 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1109,7 +1109,8 @@ static void do_vrlq_mask(TCGv_i64 mh, TCGv_i64 ml,
TCGv_i64 b, TCGv_i64 e)
tcg_temp_free_i64(t1);
}
-static bool do_vector_rotl_quad(DisasContext *ctx, arg_VX *a, bool mask)
+static bool do_vector_rotl_quad(DisasContext *ctx, arg_VX *a, bool mask,
+ bool insert)
{
TCGv_i64 ah, al, vrb, n, t0, t1, zero = tcg_constant_i64(0);
@@ -1146,7 +1147,7 @@ static bool do_vector_rotl_quad(DisasContext *ctx, arg_VX
*a, bool mask)
tcg_gen_shri_i64(ah, ah, 1);
tcg_gen_or_i64(t1, ah, t1);
- if (mask) {
+ if (mask || insert) {
tcg_gen_shri_i64(n, vrb, 8);
tcg_gen_shri_i64(vrb, vrb, 16);
tcg_gen_andi_i64(n, n, 0x7f);
@@ -1156,6 +1157,17 @@ static bool do_vector_rotl_quad(DisasContext *ctx,
arg_VX *a, bool mask)
tcg_gen_and_i64(t0, t0, ah);
tcg_gen_and_i64(t1, t1, al);
+
+ if (insert) {
+ get_avr64(n, a->vrt, true);
+ get_avr64(vrb, a->vrt, false);
+ tcg_gen_not_i64(ah, ah);
+ tcg_gen_not_i64(al, al);
+ tcg_gen_and_i64(n, n, ah);
+ tcg_gen_and_i64(vrb, vrb, al);
+ tcg_gen_or_i64(t0, t0, n);
+ tcg_gen_or_i64(t1, t1, vrb);
+ }
}
set_avr64(a->vrt, t0, true);
@@ -1171,8 +1183,9 @@ static bool do_vector_rotl_quad(DisasContext *ctx, arg_VX
*a, bool mask)
return true;
}
-TRANS(VRLQ, do_vector_rotl_quad, false)
-TRANS(VRLQNM, do_vector_rotl_quad, true)
+TRANS(VRLQ, do_vector_rotl_quad, false, false)
+TRANS(VRLQNM, do_vector_rotl_quad, true, false)
+TRANS(VRLQMI, do_vector_rotl_quad, false, true)
#define GEN_VXFORM_SAT(NAME, VECE, NORM, SAT, OPC2, OPC3) \
static void glue(glue(gen_, NAME), _vec)(unsigned vece, TCGv_vec t, \
--
2.34.1
- [PULL 60/87] ppc/pnv: Add POWER10 quads, (continued)
- [PULL 60/87] ppc/pnv: Add POWER10 quads, Cédric Le Goater, 2022/03/02
- [PULL 76/87] hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_set_string(), Cédric Le Goater, 2022/03/02
- [PULL 74/87] hw/ppc/spapr.c: use g_autofree in spapr_dt_chosen(), Cédric Le Goater, 2022/03/02
- [PULL 83/87] hw/ppc/spapr_drc.c: use g_autofree in spapr_drc_by_index(), Cédric Le Goater, 2022/03/02
- [PULL 81/87] hw/ppc/spapr_drc.c: use g_autofree in drc_unrealize(), Cédric Le Goater, 2022/03/02
- [PULL 46/87] target/ppc: Refactor VSX_SCALAR_CMP_DP, Cédric Le Goater, 2022/03/02
- [PULL 45/87] target/ppc: Remove xscmpnedp instruction, Cédric Le Goater, 2022/03/02
- [PULL 51/87] target/ppc: Implement xs{max,min}cqp, Cédric Le Goater, 2022/03/02
- [PULL 43/87] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o], Cédric Le Goater, 2022/03/02
- [PULL 16/87] target/ppc: Move Vector Compare Not Equal or Zero to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 33/87] target/ppc: implement vrlqmi,
Cédric Le Goater <=
- [PULL 39/87] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i, Cédric Le Goater, 2022/03/02
- [PULL 35/87] target/ppc: Move xxsel to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 42/87] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 48/87] target/ppc: Move xscmp{eq,ge,gt}dp to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 63/87] ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10), Cédric Le Goater, 2022/03/02
- [PULL 69/87] ppc/pnv: add XIVE Gen2 TIMA support, Cédric Le Goater, 2022/03/02
- [PULL 70/87] pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1), Cédric Le Goater, 2022/03/02
- [PULL 67/87] ppc/pnv: Add support for PHB5 "Address-based trigger" mode, Cédric Le Goater, 2022/03/02
- [PULL 66/87] ppc/pnv: Add support for PQ offload on PHB5, Cédric Le Goater, 2022/03/02
- [PULL 59/87] ppc/pnv: Add a OCC model for POWER10, Cédric Le Goater, 2022/03/02