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[PATCH v3 4/9] accel/tcg: Add guest_base_signed_addr32 for user-only
From: |
Richard Henderson |
Subject: |
[PATCH v3 4/9] accel/tcg: Add guest_base_signed_addr32 for user-only |
Date: |
Thu, 3 Mar 2022 09:15:46 -1000 |
While the host may prefer to treat 32-bit addresses as signed,
there are edge cases of guests that cannot be implemented with
addresses 0x7fff_ffff and 0x8000_0000 being non-consecutive.
Therefore, default to guest_base_signed_addr32 false, and allow
probe_guest_base to determine whether it is possible to set it
to true. A tcg backend which sets TCG_TARGET_SIGNED_ADDR32 will
have to cope with either setting for user-only.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu-all.h | 16 ++++++++++++++++
include/exec/cpu_ldst.h | 3 ++-
bsd-user/main.c | 4 ++++
linux-user/main.c | 3 +++
4 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 84caf5c3d9..26ecd3c886 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -146,6 +146,7 @@ static inline void tswap64s(uint64_t *s)
#if defined(CONFIG_USER_ONLY)
#include "exec/user/abitypes.h"
+#include "tcg-target-sa32.h"
/* On some host systems the guest address space is reserved on the host.
* This allows the guest address space to be offset to a convenient location.
@@ -154,6 +155,21 @@ extern uintptr_t guest_base;
extern bool have_guest_base;
extern unsigned long reserved_va;
+#if TCG_TARGET_SIGNED_ADDR32 && TARGET_LONG_BITS == 32
+extern bool guest_base_signed_addr32;
+#else
+#define guest_base_signed_addr32 false
+#endif
+
+static inline void set_guest_base_signed_addr32(void)
+{
+#ifdef guest_base_signed_addr32
+ qemu_build_not_reached();
+#else
+ guest_base_signed_addr32 = true;
+#endif
+}
+
/*
* Limit the guest addresses as best we can.
*
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index da987fe8ad..add45499ee 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -87,7 +87,8 @@ static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr
x)
/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
static inline void *g2h_untagged(abi_ptr x)
{
- return (void *)((uintptr_t)(x) + guest_base);
+ uintptr_t hx = guest_base_signed_addr32 ? (int32_t)x : (uintptr_t)x;
+ return (void *)(guest_base + hx);
}
static inline void *g2h(CPUState *cs, abi_ptr x)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index 88d347d05e..c181e54495 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -54,6 +54,10 @@
int singlestep;
uintptr_t guest_base;
bool have_guest_base;
+#ifndef guest_base_signed_addr32
+bool guest_base_signed_addr32;
+#endif
+
/*
* When running 32-on-64 we should make sure we can fit all of the possible
* guest address space into a contiguous chunk of virtual host memory.
diff --git a/linux-user/main.c b/linux-user/main.c
index fbc9bcfd5f..5d963ddb64 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -72,6 +72,9 @@ static const char *seed_optarg;
unsigned long mmap_min_addr;
uintptr_t guest_base;
bool have_guest_base;
+#ifndef guest_base_signed_addr32
+bool guest_base_signed_addr32;
+#endif
/*
* Used to implement backwards-compatibility for the `-strace`, and
--
2.25.1
- [PATCH v3 0/9] tcg: support 32-bit guest addresses as signed, Richard Henderson, 2022/03/03
- [PATCH v3 1/9] tcg: Add TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PATCH v3 5/9] linux-user: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PATCH v3 2/9] accel/tcg: Split out g2h_tlbe, Richard Henderson, 2022/03/03
- [PATCH v3 8/9] tcg/riscv: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PATCH v3 9/9] tcg/loongarch64: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PATCH v3 3/9] accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu, Richard Henderson, 2022/03/03
- [PATCH v3 4/9] accel/tcg: Add guest_base_signed_addr32 for user-only,
Richard Henderson <=
- [PATCH v3 7/9] tcg/mips: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PATCH v3 6/9] tcg/aarch64: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03