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Re: [PULL v2 00/21] tcg patch queue
From: |
Peter Maydell |
Subject: |
Re: [PULL v2 00/21] tcg patch queue |
Date: |
Sat, 5 Mar 2022 18:02:53 +0000 |
On Fri, 4 Mar 2022 at 19:09, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Version 2: Drop signed 32-bit guest patches while CI failure examined.
>
>
>
> The following changes since commit 3d1fbc59665ff8a5d74b0fd30583044fe99e1117:
>
> Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request'
> into staging (2022-03-04 15:31:23 +0000)
>
> are available in the Git repository at:
>
> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220304
>
> for you to fetch changes up to cf320769476c3e2820be2a6280bfa1e15baf396f:
>
> tcg/i386: Implement bitsel for avx512 (2022-03-04 08:50:41 -1000)
>
> ----------------------------------------------------------------
> Reorder do_constant_folding_cond test to satisfy valgrind.
> Fix value of MAX_OPC_PARAM_IARGS.
> Add opcodes for vector nand, nor, eqv.
> Support vector nand, nor, eqv on PPC and S390X hosts.
> Support AVX512VL, AVX512BW, AVX512DQ, and AVX512VBMI2.
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.0
for any user-visible changes.
-- PMM