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Re: [PATCH v4 14/33] target/nios2: Use hw/registerfields.h for CR_TLBACC


From: Peter Maydell
Subject: Re: [PATCH v4 14/33] target/nios2: Use hw/registerfields.h for CR_TLBACC fields
Date: Tue, 8 Mar 2022 10:19:38 +0000

On Tue, 8 Mar 2022 at 07:20, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

Empty body.

You might also mention:

"Since we're rewriting the references to CR_TLBACC_IGN_* anyway,
we correct the name of this field to IG, which is its name in the
official CPU documentation."

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/nios2/cpu.h | 23 +++++++++++++++--------
>  target/nios2/mmu.c | 16 ++++++++--------
>  2 files changed, 23 insertions(+), 16 deletions(-)
>
> diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
> index 84138000fa..024ef3ccc0 100644
> --- a/target/nios2/cpu.h
> +++ b/target/nios2/cpu.h
> @@ -115,14 +115,21 @@ FIELD(CR_PTEADDR, VPN, 2, 20)
>  FIELD(CR_PTEADDR, PTBASE, 22, 10)
>
>  #define CR_TLBACC        9
> -#define   CR_TLBACC_IGN_SHIFT 25
> -#define   CR_TLBACC_IGN_MASK  (0x7F << CR_TLBACC_IGN_SHIFT)
> -#define   CR_TLBACC_C         (1 << 24)
> -#define   CR_TLBACC_R         (1 << 23)
> -#define   CR_TLBACC_W         (1 << 22)
> -#define   CR_TLBACC_X         (1 << 21)
> -#define   CR_TLBACC_G         (1 << 20)
> -#define   CR_TLBACC_PFN_MASK  0x000FFFFF
> +
> +FIELD(CR_TLBACC, PFN, 0, 20)
> +FIELD(CR_TLBACC, G, 20, 1)
> +FIELD(CR_TLBACC, X, 21, 1)
> +FIELD(CR_TLBACC, W, 22, 1)
> +FIELD(CR_TLBACC, R, 23, 1)
> +FIELD(CR_TLBACC, C, 24, 1)
> +FIELD(CR_TLBACC, IG, 25, 7)
> +
> +#define CR_TLBACC_C  (1u << R_CR_TLBACC_C_SHIFT)
> +#define CR_TLBACC_R  (1u << R_CR_TLBACC_R_SHIFT)
> +#define CR_TLBACC_W  (1u << R_CR_TLBACC_W_SHIFT)
> +#define CR_TLBACC_X  (1u << R_CR_TLBACC_X_SHIFT)
> +#define CR_TLBACC_G  (1u << R_CR_TLBACC_G_SHIFT)

again,
#define CR_TLBACC_C R_CR_TLBACC_C_MASK
etc

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM



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