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[PULL 09/12] Hexagon (tests/tcg/hexagon) fix inline asm in preg_alias.c
From: |
Taylor Simpson |
Subject: |
[PULL 09/12] Hexagon (tests/tcg/hexagon) fix inline asm in preg_alias.c |
Date: |
Tue, 8 Mar 2022 13:54:32 -0800 |
Replace consecutive inline asm blocks with a single one with proper
outputs/inputs/clobbers rather than making assumptions about register
values being carried between separate blocks.
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20220210021556.9217-10-tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/hexagon/preg_alias.c | 46 ++++++++++++++++------------------
1 file changed, 22 insertions(+), 24 deletions(-)
diff --git a/tests/tcg/hexagon/preg_alias.c b/tests/tcg/hexagon/preg_alias.c
index 0cac469b78..9f7b125998 100644
--- a/tests/tcg/hexagon/preg_alias.c
+++ b/tests/tcg/hexagon/preg_alias.c
@@ -1,5 +1,5 @@
/*
- * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ * Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights
Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -57,17 +57,15 @@ typedef union {
static inline void creg_alias(int cval, PRegs *pregs)
{
- unsigned char val;
- asm volatile("c4 = %0" : : "r"(cval));
-
- asm volatile("%0 = p0" : "=r"(val));
- pregs->pregs.p0 = val;
- asm volatile("%0 = p1" : "=r"(val));
- pregs->pregs.p1 = val;
- asm volatile("%0 = p2" : "=r"(val));
- pregs->pregs.p2 = val;
- asm volatile("%0 = p3" : "=r"(val));
- pregs->pregs.p3 = val;
+ asm("c4 = %4\n\t"
+ "%0 = p0\n\t"
+ "%1 = p1\n\t"
+ "%2 = p2\n\t"
+ "%3 = p3\n\t"
+ : "=r"(pregs->pregs.p0), "=r"(pregs->pregs.p1),
+ "=r"(pregs->pregs.p2), "=r"(pregs->pregs.p3)
+ : "r"(cval)
+ : "c4", "p0", "p1", "p2", "p3");
}
int err;
@@ -83,19 +81,19 @@ static void check(int val, int expect)
static inline void creg_alias_pair(unsigned int cval, PRegs *pregs)
{
unsigned long long cval_pair = (0xdeadbeefULL << 32) | cval;
- unsigned char val;
int c5;
- asm volatile("c5:4 = %0" : : "r"(cval_pair));
-
- asm volatile("%0 = p0" : "=r"(val));
- pregs->pregs.p0 = val;
- asm volatile("%0 = p1" : "=r"(val));
- pregs->pregs.p1 = val;
- asm volatile("%0 = p2" : "=r"(val));
- pregs->pregs.p2 = val;
- asm volatile("%0 = p3" : "=r"(val));
- pregs->pregs.p3 = val;
- asm volatile("%0 = c5" : "=r"(c5));
+
+ asm ("c5:4 = %5\n\t"
+ "%0 = p0\n\t"
+ "%1 = p1\n\t"
+ "%2 = p2\n\t"
+ "%3 = p3\n\t"
+ "%4 = c5\n\t"
+ : "=r"(pregs->pregs.p0), "=r"(pregs->pregs.p1),
+ "=r"(pregs->pregs.p2), "=r"(pregs->pregs.p3), "=r"(c5)
+ : "r"(cval_pair)
+ : "c4", "c5", "p0", "p1", "p2", "p3");
+
check(c5, 0xdeadbeef);
}
--
2.17.1
- [PULL 00/12] Hexagon (target/hexagon) queue, Taylor Simpson, 2022/03/08
- [PULL 12/12] target/hexagon: remove unused variable, Taylor Simpson, 2022/03/08
- [PULL 09/12] Hexagon (tests/tcg/hexagon) fix inline asm in preg_alias.c,
Taylor Simpson <=
- [PULL 04/12] Hexagon (target/hexagon) properly handle denorm in arch_sf_recip_common, Taylor Simpson, 2022/03/08
- [PULL 10/12] Hexagon (target/hexagon) fix bug in conv_df2uw_chop, Taylor Simpson, 2022/03/08
- [PULL 06/12] Hexagon (tests/tcg/hexagon) test instructions that might set bits in USR, Taylor Simpson, 2022/03/08
- [PULL 02/12] Hexagon HVX (target/hexagon) fix bug in HVX saturate instructions, Taylor Simpson, 2022/03/08
- [PULL 11/12] Hexagon (target/hexagon) assignment to c4 should wait until packet commit, Taylor Simpson, 2022/03/08
- [PULL 07/12] Hexagon (tests/tcg/hexagon) add floating point instructions to usr.c, Taylor Simpson, 2022/03/08
- [PULL 05/12] Hexagon (target/hexagon) properly handle NaN in dfmin/dfmax/sfmin/sfmax, Taylor Simpson, 2022/03/08
- [PULL 01/12] Hexagon (target/hexagon) fix bug in circular addressing, Taylor Simpson, 2022/03/08
- [PULL 08/12] Hexagon (tests/tcg/hexagon) update overflow test, Taylor Simpson, 2022/03/08
- [PULL 03/12] Hexagon (target/hexagon) properly set FPINVF bit in sfcmp.uo and dfcmp.uo, Taylor Simpson, 2022/03/08