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[PATCH v5 43/48] target/nios2: Update helper_eret for shadow registers
From: |
Richard Henderson |
Subject: |
[PATCH v5 43/48] target/nios2: Update helper_eret for shadow registers |
Date: |
Thu, 10 Mar 2022 03:27:20 -0800 |
When CRS = 0, we restore from estatus; otherwise from sstatus.
Update for the new CRS.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/nios2/cpu.h | 1 +
target/nios2/op_helper.c | 3 ++-
target/nios2/translate.c | 13 ++++++++-----
3 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 26d4dcfe12..62a73c7b32 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -82,6 +82,7 @@ enum {
R_FP = 28,
R_EA = 29,
R_BA = 30,
+ R_SSTATUS = 30,
R_RA = 31,
};
diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c
index e5e70268da..2eac957f68 100644
--- a/target/nios2/op_helper.c
+++ b/target/nios2/op_helper.c
@@ -73,7 +73,7 @@ void helper_eret(CPUNios2State *env, uint32_t new_status,
uint32_t new_pc)
}
/*
- * Both estatus and bstatus have no constraints on write;
+ * None of estatus, bstatus, or sstatus have constraints on write;
* do not allow reserved fields in status to be set.
*/
new_status &= (cpu->cr_state[CR_STATUS].writable |
@@ -81,6 +81,7 @@ void helper_eret(CPUNios2State *env, uint32_t new_status,
uint32_t new_pc)
env->ctrl[CR_STATUS] = new_status;
env->pc = new_pc;
+ nios2_update_crs(env);
cpu_loop_exit(cs);
}
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 2b2f528e00..7a25c864e2 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -435,11 +435,14 @@ static void eret(DisasContext *dc, uint32_t code,
uint32_t flags)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv tmp = tcg_temp_new();
- tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_ESTATUS]));
- gen_helper_eret(cpu_env, tmp, load_gpr(dc, R_EA));
- tcg_temp_free(tmp);
-
+ if (dc->crs0) {
+ TCGv tmp = tcg_temp_new();
+ tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUNios2State, ctrl[CR_ESTATUS]));
+ gen_helper_eret(cpu_env, tmp, load_gpr(dc, R_EA));
+ tcg_temp_free(tmp);
+ } else {
+ gen_helper_eret(cpu_env, load_gpr(dc, R_SSTATUS), load_gpr(dc, R_EA));
+ }
dc->base.is_jmp = DISAS_NORETURN;
#endif
}
--
2.25.1
- [PATCH v5 39/48] target/nios2: Implement Misaligned destination exception, (continued)
- [PATCH v5 39/48] target/nios2: Implement Misaligned destination exception, Richard Henderson, 2022/03/10
- [PATCH v5 41/48] target/nios2: Introduce shadow register sets, Richard Henderson, 2022/03/10
- [PATCH v5 46/48] hw/nios2: Introduce Nios2MachineState, Richard Henderson, 2022/03/10
- [PATCH v5 40/48] linux-user/nios2: Handle various SIGILL exceptions, Richard Henderson, 2022/03/10
- [PATCH v5 42/48] target/nios2: Implement rdprs, wrprs, Richard Henderson, 2022/03/10
- [PATCH v5 43/48] target/nios2: Update helper_eret for shadow registers,
Richard Henderson <=
- [PATCH v5 44/48] target/nios2: Implement EIC interrupt processing, Richard Henderson, 2022/03/10
- [PATCH v5 45/48] hw/intc: Vectored Interrupt Controller (VIC), Richard Henderson, 2022/03/10
- [PATCH v5 47/48] hw/nios2: Move memory regions into Nios2Machine, Richard Henderson, 2022/03/10
- [PATCH v5 48/48] hw/nios2: Machine with a Vectored Interrupt Controller, Richard Henderson, 2022/03/10