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Re: [PATCH] tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1


From: Richard Henderson
Subject: Re: [PATCH] tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1
Date: Fri, 11 Mar 2022 09:52:32 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0

On 3/11/22 06:02, Alex Bennée wrote:
A wider question. Is this something that can be handled the constraints
done by the register allocator? I assume that avoid direct aliasing if
needed?

No. We do have "allocate a non-overlapping register"; we don't have "allocate an aligned register pair", which *would* be helpful.

However, in this specific case "addend" is completely invisible to the register allocator, coming entirely from the backend's tlb implementation (or guest_base).


r~



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