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[PATCH v9 26/45] hw/cxl/component: Add utils for interleave parameter en
From: |
Jonathan Cameron |
Subject: |
[PATCH v9 26/45] hw/cxl/component: Add utils for interleave parameter encoding/decoding |
Date: |
Mon, 4 Apr 2022 16:14:26 +0100 |
From: Jonathan Cameron <jonathan.cameron@huawei.com>
Both registers and the CFMWS entries in CDAT use simple encodings
for the number of interleave ways and the interleave granularity.
Introduce simple conversion functions to/from the unencoded
number / size. So far the iw decode has not been needed so is
it not implemented.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
hw/cxl/cxl-component-utils.c | 34 ++++++++++++++++++++++++++++++++++
include/hw/cxl/cxl_component.h | 8 ++++++++
2 files changed, 42 insertions(+)
diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c
index 22e52cef17..1a1adbd4cb 100644
--- a/hw/cxl/cxl-component-utils.c
+++ b/hw/cxl/cxl-component-utils.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
+#include "qapi/error.h"
#include "hw/pci/pci.h"
#include "hw/cxl/cxl.h"
@@ -223,3 +224,36 @@ void cxl_component_create_dvsec(CXLComponentState *cxl,
uint16_t length,
range_init_nofail(&cxl->dvsecs[type], cxl->dvsec_offset, length);
cxl->dvsec_offset += length;
}
+
+uint8_t cxl_interleave_ways_enc(int iw, Error **errp)
+{
+ switch (iw) {
+ case 1: return 0x0;
+ case 2: return 0x1;
+ case 4: return 0x2;
+ case 8: return 0x3;
+ case 16: return 0x4;
+ case 3: return 0x8;
+ case 6: return 0x9;
+ case 12: return 0xa;
+ default:
+ error_setg(errp, "Interleave ways: %d not supported", iw);
+ return 0;
+ }
+}
+
+uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp)
+{
+ switch (gran) {
+ case 256: return 0;
+ case 512: return 1;
+ case 1024: return 2;
+ case 2048: return 3;
+ case 4096: return 4;
+ case 8192: return 5;
+ case 16384: return 6;
+ default:
+ error_setg(errp, "Interleave granularity: %" PRIu64 " invalid", gran);
+ return 0;
+ }
+}
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h
index 5b15bd6c3f..b0f95d3484 100644
--- a/include/hw/cxl/cxl_component.h
+++ b/include/hw/cxl/cxl_component.h
@@ -194,4 +194,12 @@ void cxl_component_register_init_common(uint32_t
*reg_state,
void cxl_component_create_dvsec(CXLComponentState *cxl_cstate, uint16_t length,
uint16_t type, uint8_t rev, uint8_t *body);
+uint8_t cxl_interleave_ways_enc(int iw, Error **errp);
+uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp);
+
+static inline hwaddr cxl_decode_ig(int ig)
+{
+ return 1 << (ig + 8);
+}
+
#endif
--
2.32.0
- [PATCH v9 18/45] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), (continued)
- [PATCH v9 18/45] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), Jonathan Cameron, 2022/04/04
- [PATCH v9 19/45] hw/cxl/device: Add some trivial commands, Jonathan Cameron, 2022/04/04
- [PATCH v9 20/45] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing, Jonathan Cameron, 2022/04/04
- [PATCH v9 21/45] hw/cxl/device: Implement get/set Label Storage Area (LSA), Jonathan Cameron, 2022/04/04
- [PATCH v9 22/45] qtests/cxl: Add initial root port and CXL type3 tests, Jonathan Cameron, 2022/04/04
- [PATCH v9 23/45] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142), Jonathan Cameron, 2022/04/04
- [PATCH v9 24/45] acpi/cxl: Add _OSC implementation (9.14.2), Jonathan Cameron, 2022/04/04
- [PATCH v9 25/45] acpi/cxl: Create the CEDT (9.14.1), Jonathan Cameron, 2022/04/04
- [PATCH v9 26/45] hw/cxl/component: Add utils for interleave parameter encoding/decoding,
Jonathan Cameron <=
- [PATCH v9 27/45] hw/cxl/host: Add support for CXL Fixed Memory Windows., Jonathan Cameron, 2022/04/04
- [PATCH v9 28/45] acpi/cxl: Introduce CFMWS structures in CEDT, Jonathan Cameron, 2022/04/04
- [PATCH v9 29/45] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl, Jonathan Cameron, 2022/04/04
- [PATCH v9 30/45] pci/pcie_port: Add pci_find_port_by_pn(), Jonathan Cameron, 2022/04/04
- [PATCH v9 31/45] CXL/cxl_component: Add cxl_get_hb_cstate(), Jonathan Cameron, 2022/04/04
- [PATCH v9 32/45] mem/cxl_type3: Add read and write functions for associated hostmem., Jonathan Cameron, 2022/04/04
- [PATCH v9 33/45] cxl/cxl-host: Add memops for CFMWS region., Jonathan Cameron, 2022/04/04