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Re: [PATCH 14/16] target/arm: Implement ESB instruction


From: Richard Henderson
Subject: Re: [PATCH 14/16] target/arm: Implement ESB instruction
Date: Tue, 12 Apr 2022 07:31:01 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0

On 4/12/22 02:56, Peter Maydell wrote:
On Mon, 11 Apr 2022 at 23:14, Richard Henderson
<richard.henderson@linaro.org> wrote:

On 4/11/22 09:18, Peter Maydell wrote:
+      ESB        ---- 0011 0010 0000 1111 ---- 0001 0000
+    ]

Why don't we decode bits [11:8] here? I see it's the same
as YIELD/WFE/WFI, but I'm not sure why we're not decoding
those bits in those insns either...

See page F4-7074 in H.a, where bits [11:8] of the imm12 field are described 
with 'xxxx'.

Hmm. That just means "decodes to the NOP/WFI/ESB/whatever
instruction-description whatever the value of those bits",
but when the specific instruction-description then marks
those bits as "(0)" or "(1)", that has the usual CONSTRAINED
UNPREDICTABLE meaning described in section F1.7.2, where
we get a free choice of UNDEF, NOP, ignore the bit, or
any-dest-regs-are-UNKNOWN. So we're within the spec to
not decode [11:8] but I think it would be more consistent
with how we try to handle those (0) and (1) bits generally
if we insist that [11:8] is all zeroes here.

For this series, I guess go along with the current way we
handle hint instructions, and maybe fix this as a separate
cleanup later.

Ok.

r~



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