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[PATCH 1/4] Add AVX_EN hflag
From: |
Paul Brook |
Subject: |
[PATCH 1/4] Add AVX_EN hflag |
Date: |
Mon, 18 Apr 2022 18:39:01 +0100 |
Add a new hflag bit to determine whether AVX instructions are allowed
Signed-off-by: Paul Brook <paul@nowt.org>
---
target/i386/cpu.h | 3 +++
target/i386/helper.c | 12 ++++++++++++
target/i386/tcg/fpu_helper.c | 1 +
3 files changed, 16 insertions(+)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 982c532353..0c7162e2fd 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -168,6 +168,7 @@ typedef enum X86Seg {
#define HF_MPX_EN_SHIFT 25 /* MPX Enabled (CR4+XCR0+BNDCFGx) */
#define HF_MPX_IU_SHIFT 26 /* BND registers in-use */
#define HF_UMIP_SHIFT 27 /* CR4.UMIP */
+#define HF_AVX_EN_SHIFT 28 /* AVX Enabled (CR4+XCR0) */
#define HF_CPL_MASK (3 << HF_CPL_SHIFT)
#define HF_INHIBIT_IRQ_MASK (1 << HF_INHIBIT_IRQ_SHIFT)
@@ -194,6 +195,7 @@ typedef enum X86Seg {
#define HF_MPX_EN_MASK (1 << HF_MPX_EN_SHIFT)
#define HF_MPX_IU_MASK (1 << HF_MPX_IU_SHIFT)
#define HF_UMIP_MASK (1 << HF_UMIP_SHIFT)
+#define HF_AVX_EN_MASK (1 << HF_AVX_EN_SHIFT)
/* hflags2 */
@@ -2045,6 +2047,7 @@ void host_cpuid(uint32_t function, uint32_t count,
/* helper.c */
void x86_cpu_set_a20(X86CPU *cpu, int a20_state);
+void cpu_sync_avx_hflag(CPUX86State *env);
#ifndef CONFIG_USER_ONLY
static inline int x86_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
diff --git a/target/i386/helper.c b/target/i386/helper.c
index fa409e9c44..30083c9cff 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -29,6 +29,17 @@
#endif
#include "qemu/log.h"
+void cpu_sync_avx_hflag(CPUX86State *env)
+{
+ if ((env->cr[4] & CR4_OSXSAVE_MASK)
+ && (env->xcr0 & (XSTATE_SSE_MASK | XSTATE_YMM_MASK))
+ == (XSTATE_SSE_MASK | XSTATE_YMM_MASK)) {
+ env->hflags |= HF_AVX_EN_MASK;
+ } else{
+ env->hflags &= ~HF_AVX_EN_MASK;
+ }
+}
+
void cpu_sync_bndcs_hflags(CPUX86State *env)
{
uint32_t hflags = env->hflags;
@@ -209,6 +220,7 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4)
env->hflags = hflags;
cpu_sync_bndcs_hflags(env);
+ cpu_sync_avx_hflag(env);
}
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index ebf5e73df9..b391b69635 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2943,6 +2943,7 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx,
uint64_t mask)
env->xcr0 = mask;
cpu_sync_bndcs_hflags(env);
+ cpu_sync_avx_hflag(env);
return;
do_gpf:
--
2.35.2
- [PATCH 0/3] AVX guest implementation, Paul Brook, 2022/04/18
- [PATCH 1/4] Add AVX_EN hflag,
Paul Brook <=
- [PATCH 3/4] Enable all x86-64 cpu features in user mode, Paul Brook, 2022/04/18
- [PATCH 2/4] TCG support for AVX, Paul Brook, 2022/04/18
- Re: [PATCH 2/4] TCG support for AVX, Peter Maydell, 2022/04/18
- Re: [PATCH 2/4] TCG support for AVX, Paul Brook, 2022/04/18
- Re: [PATCH 2/4] TCG support for AVX, Peter Maydell, 2022/04/18
- Re: [PATCH 2/4] TCG support for AVX, Richard Henderson, 2022/04/18
- Re: [PATCH 2/4] TCG support for AVX, Paolo Bonzini, 2022/04/20
- Re: [PATCH 2/4] TCG support for AVX, Paul Brook, 2022/04/20
[PATCH 4/4] AVX tests, Paul Brook, 2022/04/18