[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 2/5] i386: Hyper-V Enlightened MSR bitmap feature
From: |
Vitaly Kuznetsov |
Subject: |
[PATCH v3 2/5] i386: Hyper-V Enlightened MSR bitmap feature |
Date: |
Tue, 19 Apr 2022 16:48:00 +0200 |
The newly introduced enlightenment allow L0 (KVM) and L1 (Hyper-V)
hypervisors to collaborate to avoid unnecessary updates to L2
MSR-Bitmap upon vmexits.
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
docs/hyperv.txt | 10 ++++++++++
target/i386/cpu.c | 2 ++
target/i386/cpu.h | 1 +
target/i386/kvm/hyperv-proto.h | 5 +++++
target/i386/kvm/kvm.c | 7 +++++++
5 files changed, 25 insertions(+)
diff --git a/docs/hyperv.txt b/docs/hyperv.txt
index 0417c183a3b0..08429124a634 100644
--- a/docs/hyperv.txt
+++ b/docs/hyperv.txt
@@ -225,6 +225,16 @@ default (WS2016).
Note: hv-version-id-* are not enlightenments and thus don't enable Hyper-V
identification when specified without any other enlightenments.
+3.21. hv-emsr-bitmap
+=====================
+The enlightenment is nested specific, it targets Hyper-V on KVM guests. When
+enabled, it allows L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to
+avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. While the protocol is
+supported for both VMX (Intel) and SVM (AMD), the VMX implementation requires
+Enlightened VMCS ('hv-evmcs') feature to also be enabled.
+
+Recommended: hv-evmcs (Intel)
+
4. Supplementary features
=========================
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index cb6b5467d067..3f053919685f 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6925,6 +6925,8 @@ static Property x86_cpu_properties[] = {
HYPERV_FEAT_STIMER_DIRECT, 0),
DEFINE_PROP_BIT64("hv-avic", X86CPU, hyperv_features,
HYPERV_FEAT_AVIC, 0),
+ DEFINE_PROP_BIT64("hv-emsr-bitmap", X86CPU, hyperv_features,
+ HYPERV_FEAT_MSR_BITMAP, 0),
DEFINE_PROP_ON_OFF_AUTO("hv-no-nonarch-coresharing", X86CPU,
hyperv_no_nonarch_cs, ON_OFF_AUTO_OFF),
DEFINE_PROP_BOOL("hv-passthrough", X86CPU, hyperv_passthrough, false),
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 73dc387c52f5..9615c330315f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1084,6 +1084,7 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
#define HYPERV_FEAT_IPI 13
#define HYPERV_FEAT_STIMER_DIRECT 14
#define HYPERV_FEAT_AVIC 15
+#define HYPERV_FEAT_MSR_BITMAP 16
#ifndef HYPERV_SPINLOCK_NEVER_NOTIFY
#define HYPERV_SPINLOCK_NEVER_NOTIFY 0xFFFFFFFF
diff --git a/target/i386/kvm/hyperv-proto.h b/target/i386/kvm/hyperv-proto.h
index 89f81afda7c6..38e25468122d 100644
--- a/target/i386/kvm/hyperv-proto.h
+++ b/target/i386/kvm/hyperv-proto.h
@@ -72,6 +72,11 @@
#define HV_ENLIGHTENED_VMCS_RECOMMENDED (1u << 14)
#define HV_NO_NONARCH_CORESHARING (1u << 18)
+/*
+ * HV_CPUID_NESTED_FEATURES.EAX bits
+ */
+#define HV_NESTED_MSR_BITMAP (1u << 19)
+
/*
* Basic virtualized MSRs
*/
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index ff79994faa87..4059b46b9449 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -966,6 +966,13 @@ static struct {
.bits = HV_DEPRECATING_AEOI_RECOMMENDED}
}
},
+ [HYPERV_FEAT_MSR_BITMAP] = {
+ .desc = "enlightened MSR-Bitmap (hv-emsr-bitmap)",
+ .flags = {
+ {.func = HV_CPUID_NESTED_FEATURES, .reg = R_EAX,
+ .bits = HV_NESTED_MSR_BITMAP}
+ }
+ },
};
static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max,
--
2.35.1
- [PATCH v3 0/5] i386: Enable newly introduced KVM Hyper-V enlightenments, Vitaly Kuznetsov, 2022/04/19
- [PATCH v3 5/5] i386: Hyper-V Direct TLB flush hypercall, Vitaly Kuznetsov, 2022/04/19
- [PATCH v3 1/5] i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES, Vitaly Kuznetsov, 2022/04/19
- [PATCH v3 2/5] i386: Hyper-V Enlightened MSR bitmap feature,
Vitaly Kuznetsov <=
- [PATCH v3 3/5] i386: Hyper-V XMM fast hypercall input feature, Vitaly Kuznetsov, 2022/04/19
- [PATCH v3 4/5] i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls, Vitaly Kuznetsov, 2022/04/19
- Re: [PATCH v3 0/5] i386: Enable newly introduced KVM Hyper-V enlightenments, Paolo Bonzini, 2022/04/29