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[PULL 11/31] hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq st
From: |
Peter Maydell |
Subject: |
[PULL 11/31] hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq struct |
Date: |
Thu, 21 Apr 2022 12:18:26 +0100 |
The only time we use the int_gic_irq[] array in the Exynos4210Irq
struct is in the exynos4210_realize() function: we initialize it with
the GPIO inputs of the a9mpcore device, and then a bit later on we
connect those to the outputs of the internal combiner. Now that the
a9mpcore object is easily accessible as s->a9mpcore we can make the
connection directly from one device to the other without going via
this array.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-5-peter.maydell@linaro.org
---
include/hw/arm/exynos4210.h | 1 -
hw/arm/exynos4210.c | 6 ++----
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index 215c039b414..923ce987627 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -82,7 +82,6 @@
typedef struct Exynos4210Irq {
qemu_irq int_combiner_irq[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
qemu_irq ext_combiner_irq[EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ];
- qemu_irq int_gic_irq[EXYNOS4210_INT_GIC_NIRQ];
qemu_irq ext_gic_irq[EXYNOS4210_EXT_GIC_NIRQ];
qemu_irq board_irqs[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
} Exynos4210Irq;
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index ef4d646eb91..60fc5a2ffe7 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -252,9 +252,6 @@ static void exynos4210_realize(DeviceState *socdev, Error
**errp)
sysbus_connect_irq(busdev, n,
qdev_get_gpio_in(DEVICE(&s->cpu_irq_orgate[n]), 0));
}
- for (n = 0; n < EXYNOS4210_INT_GIC_NIRQ; n++) {
- s->irqs.int_gic_irq[n] = qdev_get_gpio_in(DEVICE(&s->a9mpcore), n);
- }
/* Cache controller */
sysbus_create_simple("l2x0", EXYNOS4210_L2X0_BASE_ADDR, NULL);
@@ -281,7 +278,8 @@ static void exynos4210_realize(DeviceState *socdev, Error
**errp)
busdev = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(busdev, &error_fatal);
for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
- sysbus_connect_irq(busdev, n, s->irqs.int_gic_irq[n]);
+ sysbus_connect_irq(busdev, n,
+ qdev_get_gpio_in(DEVICE(&s->a9mpcore), n));
}
exynos4210_combiner_get_gpioin(&s->irqs, dev, 0);
sysbus_mmio_map(busdev, 0, EXYNOS4210_INT_COMBINER_BASE_ADDR);
--
2.25.1
- [PULL 01/31] hw/arm/virt: Check for attempt to use TrustZone with KVM or HVF, (continued)
- [PULL 01/31] hw/arm/virt: Check for attempt to use TrustZone with KVM or HVF, Peter Maydell, 2022/04/21
- [PULL 03/31] hw/arm/xlnx-zynqmp: Connect 4 TTC timers, Peter Maydell, 2022/04/21
- [PULL 02/31] timer: cadence_ttc: Break out header file to allow embedding, Peter Maydell, 2022/04/21
- [PULL 04/31] hw/arm: versal: Create an APU CPU Cluster, Peter Maydell, 2022/04/21
- [PULL 07/31] hw/arm: versal: Connect the CRL, Peter Maydell, 2022/04/21
- [PULL 06/31] hw/misc: Add a model of the Xilinx Versal CRL, Peter Maydell, 2022/04/21
- [PULL 05/31] hw/arm: versal: Add the Cortex-R5Fs, Peter Maydell, 2022/04/21
- [PULL 08/31] hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate device, Peter Maydell, 2022/04/21
- [PULL 10/31] hw/arm/exynos4210: Put a9mpcore device into state struct, Peter Maydell, 2022/04/21
- [PULL 09/31] hw/intc/exynos4210_gic: Remove unused TYPE_EXYNOS4210_IRQ_GATE, Peter Maydell, 2022/04/21
- [PULL 11/31] hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq struct,
Peter Maydell <=
- [PULL 22/31] hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs, Peter Maydell, 2022/04/21
- [PULL 12/31] hw/arm/exynos4210: Coalesce board_irqs and irq_table, Peter Maydell, 2022/04/21
- [PULL 21/31] hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both combiners, Peter Maydell, 2022/04/21
- [PULL 23/31] hw/arm/exynos4210: Fold combiner splits into exynos4210_init_board_irqs(), Peter Maydell, 2022/04/21
- [PULL 14/31] hw/arm/exynos4210: Move exynos4210_init_board_irqs() into exynos4210.c, Peter Maydell, 2022/04/21
- [PULL 20/31] hw/arm/exynos4210: Fill in irq_table[] for internal-combiner-only IRQ lines, Peter Maydell, 2022/04/21
- [PULL 15/31] hw/arm/exynos4210: Put external GIC into state struct, Peter Maydell, 2022/04/21
- [PULL 13/31] hw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic_id[], Peter Maydell, 2022/04/21
- [PULL 19/31] hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs(), Peter Maydell, 2022/04/21
- [PULL 18/31] hw/arm/exynos4210: Delete unused macro definitions, Peter Maydell, 2022/04/21