Re: [PATCH v5 1/5] hw/i386: add 4g boundary start to X86MachineState

[Joao Martins]

On 6/16/22 14:05, Igor Mammedov wrote:
> On Fri, 20 May 2022 11:45:28 +0100
> Joao Martins <joao.m.martins@oracle.com> wrote:
>> Rather than hardcoding the 4G boundary everywhere, introduce a
>> X86MachineState property @above_4g_mem_start and use it
> so far it's just field not a property /fix commit message/
> 
Fixed.

>> accordingly.
>>
>> This is in preparation for relocating ram-above-4g to be
>> dynamically start at 1T on AMD platforms.
> 
> possibly needs to be rebased on top of current master to include cxl_base
> 
Yeap. I fxed the cxl_base as following:

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 82cfafc1c3b6..a9d1bf95649a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -930,7 +930,7 @@ void pc_memory_init(PCMachineState *pcms,
         } else if (pcms->sgx_epc.size != 0) {
             cxl_base = sgx_epc_above_4g_end(&pcms->sgx_epc);
         } else {
-            cxl_base = 0x100000000ULL + x86ms->above_4g_mem_size;
+            cxl_base = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
         }

         e820_add_entry(cxl_base, cxl_size, E820_RESERVED);


> with comments fixed
> 
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> 

I added this -- Thanks a lot!

>>
>> Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
>> ---
>>  hw/i386/acpi-build.c  | 2 +-
>>  hw/i386/pc.c          | 9 +++++----
>>  hw/i386/sgx.c         | 2 +-
>>  hw/i386/x86.c         | 1 +
>>  include/hw/i386/x86.h | 3 +++
>>  5 files changed, 11 insertions(+), 6 deletions(-)
>>
>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>> index c125939ed6f9..3160b20c9574 100644
>> --- a/hw/i386/acpi-build.c
>> +++ b/hw/i386/acpi-build.c
>> @@ -2120,7 +2120,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, 
>> MachineState *machine)
>>                  build_srat_memory(table_data, mem_base, mem_len, i - 1,
>>                                    MEM_AFFINITY_ENABLED);
>>              }
>> -            mem_base = 1ULL << 32;
>> +            mem_base = x86ms->above_4g_mem_start;
>>              mem_len = next_base - x86ms->below_4g_mem_size;
>>              next_base = mem_base + mem_len;
>>          }
>> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
>> index 7c39c913355b..f7da1d5dd40d 100644
>> --- a/hw/i386/pc.c
>> +++ b/hw/i386/pc.c
>> @@ -832,9 +832,10 @@ void pc_memory_init(PCMachineState *pcms,
>>                                   machine->ram,
>>                                   x86ms->below_4g_mem_size,
>>                                   x86ms->above_4g_mem_size);
>> -        memory_region_add_subregion(system_memory, 0x100000000ULL,
>> +        memory_region_add_subregion(system_memory, 
>> x86ms->above_4g_mem_start,
>>                                      ram_above_4g);
>> -        e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
>> +        e820_add_entry(x86ms->above_4g_mem_start, x86ms->above_4g_mem_size,
>> +                       E820_RAM);
>>      }
>>  
>>      if (pcms->sgx_epc.size != 0) {
>> @@ -875,7 +876,7 @@ void pc_memory_init(PCMachineState *pcms,
>>              machine->device_memory->base = 
>> sgx_epc_above_4g_end(&pcms->sgx_epc);
>>          } else {
>>              machine->device_memory->base =
>> -                0x100000000ULL + x86ms->above_4g_mem_size;
>> +                x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
>>          }
>>  
>>          machine->device_memory->base =
>> @@ -1019,7 +1020,7 @@ uint64_t pc_pci_hole64_start(void)
>>      } else if (pcms->sgx_epc.size != 0) {
>>              hole64_start = sgx_epc_above_4g_end(&pcms->sgx_epc);
>>      } else {
>> -        hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size;
>> +        hole64_start = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
>>      }
>>  
>>      return ROUND_UP(hole64_start, 1 * GiB);
>> diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
>> index a44d66ba2afc..09d9c7c73d9f 100644
>> --- a/hw/i386/sgx.c
>> +++ b/hw/i386/sgx.c
>> @@ -295,7 +295,7 @@ void pc_machine_init_sgx_epc(PCMachineState *pcms)
>>          return;
>>      }
>>  
>> -    sgx_epc->base = 0x100000000ULL + x86ms->above_4g_mem_size;
>> +    sgx_epc->base = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
>>  
>>      memory_region_init(&sgx_epc->mr, OBJECT(pcms), "sgx-epc", UINT64_MAX);
>>      memory_region_add_subregion(get_system_memory(), sgx_epc->base,
>> diff --git a/hw/i386/x86.c b/hw/i386/x86.c
>> index 78b05ab7a2d1..af3c790a2830 100644
>> --- a/hw/i386/x86.c
>> +++ b/hw/i386/x86.c
>> @@ -1373,6 +1373,7 @@ static void x86_machine_initfn(Object *obj)
>>      x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
>>      x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
>>      x86ms->bus_lock_ratelimit = 0;
>> +    x86ms->above_4g_mem_start = 0x100000000ULL;
> 
> s/0x.../4 * GiB/
> 
Fixed.

>>  }
>>  
>>  static void x86_machine_class_init(ObjectClass *oc, void *data)
>> diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
>> index 9089bdd99c3a..df82c5fd4252 100644
>> --- a/include/hw/i386/x86.h
>> +++ b/include/hw/i386/x86.h
>> @@ -56,6 +56,9 @@ struct X86MachineState {
>>      /* RAM information (sizes, addresses, configuration): */
>>      ram_addr_t below_4g_mem_size, above_4g_mem_size;
>>  
>> +    /* Start address of the initial RAM above 4G */
>> +    uint64_t above_4g_mem_start;
>> +
>>      /* CPU and apic information: */
>>      bool apic_xrupt_override;
>>      unsigned pci_irq_mask;
>