[RFC PATCH 24/40] target/arm/hvf: Probe host into ARMCPUClass

[Richard Henderson]

We can now store these values into ARMCPUClass instead of into
a temporary ARMHostCPUFeatures structure.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.h     |  5 ----
 target/arm/hvf_arm.h |  2 +-
 target/arm/cpu.c     | 13 ----------
 target/arm/cpu64.c   |  4 +--
 target/arm/hvf/hvf.c | 59 +++++++++++---------------------------------
 5 files changed, 17 insertions(+), 66 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 0c5b942ed0..e8dd75b003 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -935,11 +935,6 @@ struct ArchCPU {
     /* KVM steal time */
     OnOffAuto kvm_steal_time;
 
-    /* True if we tried kvm_arm_host_cpu_features() during CPU instance_init
-     * and the probe failed (so we need to report the error in realize)
-     */
-    bool host_cpu_probe_failed;
-
     /* Specify the number of cores in this CPU cluster. Used for the L2CTLR
      * register.
      */
diff --git a/target/arm/hvf_arm.h b/target/arm/hvf_arm.h
index 9a9d1a0bf5..c3b34ba31d 100644
--- a/target/arm/hvf_arm.h
+++ b/target/arm/hvf_arm.h
@@ -13,6 +13,6 @@
 
 #include "cpu.h"
 
-void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu);
+bool hvf_arm_get_host_cpu_features(ARMCPUClass *acc, Error **errp);
 
 #endif
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index c58029fb4a..f4d8be6c4c 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1584,19 +1584,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error 
**errp)
     Error *local_err = NULL;
     bool no_aa32 = false;
 
-    /* If we needed to query the host kernel for the CPU features
-     * then it's possible that might have failed in the initfn, but
-     * this is the first point where we can report it.
-     */
-    if (cpu->host_cpu_probe_failed) {
-        if (!kvm_enabled() && !hvf_enabled()) {
-            error_setg(errp, "The 'host' CPU type can only be used with KVM or 
HVF");
-        } else {
-            error_setg(errp, "Failed to retrieve host CPU features");
-        }
-        return;
-    }
-
 #ifndef CONFIG_USER_ONLY
     /* The NVIC and M-profile CPU are two halves of a single piece of
      * hardware; trying to use one without the other is a command line
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index a21bc39449..f94f775585 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -1111,7 +1111,7 @@ static bool aarch64_host_class_late_init(ARMCPUClass 
*acc, Error **errp)
         return kvm_arm_get_host_cpu_features(acc, errp);
     }
     if (hvf_enabled()) {
-        return true;
+        return hvf_arm_get_host_cpu_features(acc, errp);
     }
     error_setg(errp, "The 'host' CPU type can only be used with KVM or HVF");
     return false;
@@ -1123,8 +1123,6 @@ static void aarch64_host_object_init(Object *obj)
     aarch64_add_sve_properties(obj);
     aarch64_add_pauth_properties(obj);
 #elif defined(CONFIG_HVF)
-    ARMCPU *cpu = ARM_CPU(obj);
-    hvf_arm_set_cpu_features_from_host(cpu);
     aarch64_add_pauth_properties(obj);
 #else
     g_assert_not_reached();
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 8bb8b475cd..d47159b9bf 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -95,14 +95,6 @@ typedef struct HVFVTimer {
 
 static HVFVTimer vtimer;
 
-typedef struct ARMHostCPUFeatures {
-    ARMISARegisters isar;
-    uint64_t midr;
-    uint32_t reset_sctlr;
-} ARMHostCPUFeatures;
-
-static ARMHostCPUFeatures arm_host_cpu_features;
-
 struct hvf_reg_match {
     int reg;
     uint64_t offset;
@@ -465,22 +457,21 @@ static uint64_t hvf_get_reg(CPUState *cpu, int rt)
     return val;
 }
 
-static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
+bool hvf_arm_get_host_cpu_features(ARMCPUClass *acc, Error **errp)
 {
-    ARMISARegisters host_isar = {};
     const struct isar_regs {
         int reg;
         uint64_t *val;
     } regs[] = {
-        { HV_SYS_REG_ID_AA64PFR0_EL1, &host_isar.id_aa64pfr0 },
-        { HV_SYS_REG_ID_AA64PFR1_EL1, &host_isar.id_aa64pfr1 },
-        { HV_SYS_REG_ID_AA64DFR0_EL1, &host_isar.id_aa64dfr0 },
-        { HV_SYS_REG_ID_AA64DFR1_EL1, &host_isar.id_aa64dfr1 },
-        { HV_SYS_REG_ID_AA64ISAR0_EL1, &host_isar.id_aa64isar0 },
-        { HV_SYS_REG_ID_AA64ISAR1_EL1, &host_isar.id_aa64isar1 },
-        { HV_SYS_REG_ID_AA64MMFR0_EL1, &host_isar.id_aa64mmfr0 },
-        { HV_SYS_REG_ID_AA64MMFR1_EL1, &host_isar.id_aa64mmfr1 },
-        { HV_SYS_REG_ID_AA64MMFR2_EL1, &host_isar.id_aa64mmfr2 },
+        { HV_SYS_REG_ID_AA64PFR0_EL1, &acc->isar.id_aa64pfr0 },
+        { HV_SYS_REG_ID_AA64PFR1_EL1, &acc->isar.id_aa64pfr1 },
+        { HV_SYS_REG_ID_AA64DFR0_EL1, &acc->isar.id_aa64dfr0 },
+        { HV_SYS_REG_ID_AA64DFR1_EL1, &acc->isar.id_aa64dfr1 },
+        { HV_SYS_REG_ID_AA64ISAR0_EL1, &acc->isar.id_aa64isar0 },
+        { HV_SYS_REG_ID_AA64ISAR1_EL1, &acc->isar.id_aa64isar1 },
+        { HV_SYS_REG_ID_AA64MMFR0_EL1, &acc->isar.id_aa64mmfr0 },
+        { HV_SYS_REG_ID_AA64MMFR1_EL1, &acc->isar.id_aa64mmfr1 },
+        { HV_SYS_REG_ID_AA64MMFR2_EL1, &acc->isar.id_aa64mmfr2 },
     };
     hv_vcpu_t fd;
     hv_return_t r = HV_SUCCESS;
@@ -496,50 +487,30 @@ static bool 
hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
     for (i = 0; i < ARRAY_SIZE(regs); i++) {
         r |= hv_vcpu_get_sys_reg(fd, regs[i].reg, regs[i].val);
     }
-    r |= hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &ahcf->midr);
+    r |= hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &acc->midr);
     r |= hv_vcpu_destroy(fd);
 
-    ahcf->isar = host_isar;
-
     /*
      * A scratch vCPU returns SCTLR 0, so let's fill our default with the M1
      * boot SCTLR from https://github.com/AsahiLinux/m1n1/issues/97
      */
-    ahcf->reset_sctlr = 0x30100180;
+    acc->reset_sctlr = 0x30100180;
+
     /*
      * SPAN is disabled by default when SCTLR.SPAN=1. To improve compatibility,
      * let's disable it on boot and then allow guest software to turn it on by
      * setting it to 0.
      */
-    ahcf->reset_sctlr |= 0x00800000;
+    acc->reset_sctlr |= 0x00800000;
 
     /* Make sure we don't advertise AArch32 support for EL0/EL1 */
-    if ((host_isar.id_aa64pfr0 & 0xff) != 0x11) {
+    if ((acc->isar.id_aa64pfr0 & 0xff) != 0x11) {
         return false;
     }
 
     return r == HV_SUCCESS;
 }
 
-void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu)
-{
-    if (!arm_host_cpu_features.reset_sctlr) {
-        if (!hvf_enabled() ||
-            !hvf_arm_get_host_cpu_features(&arm_host_cpu_features)) {
-            /*
-             * We can't report this error yet, so flag that we need to
-             * in arm_cpu_realizefn().
-             */
-            cpu->host_cpu_probe_failed = true;
-            return;
-        }
-    }
-
-    cpu->isar = arm_host_cpu_features.isar;
-    cpu->midr = arm_host_cpu_features.midr;
-    cpu->reset_sctlr = arm_host_cpu_features.reset_sctlr;
-}
-
 void hvf_arch_vcpu_destroy(CPUState *cpu)
 {
 }
-- 
2.34.1