[PATCH 0/6] hw/mips/gt64xxx_pci: Fix endianness swap on big-endian hosts

[Philippe Mathieu-Daudé]

While working on endianness consolidation I figured
a long-standing bug in the GT64120 while accessing
PCI config/data registers from the CPU bus (via the
ISD).
While the debugging was painful, the fix is quite
easy: simply use the endianness MemoryRegionOps
provided by the abstract PCI_HOST_BRIDGE class.

Patches 1-3 were useful while debugging.
patch 5 is the fix and patch 6 add a test to keep
testing on BE hosts.

Philippe Mathieu-Daudé (6):
  hw/pci/pci_host: Trace config accesses on unexisting functions
  hw/mips/malta: Split FPGA LEDs/ASCII display updates
  hw/mips/malta: Trace FPGA LEDs/ASCII display updates
  hw/mips/gt64xxx_pci: Accumulate address space changes
  hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps
  tests/avocado: Add tests booting YAMON ROM on MIPS Malta machines

 hw/mips/gt64xxx_pci.c               | 78 +++++++++++++++++++++--------
 hw/mips/malta.c                     | 16 ++++--
 hw/mips/trace-events                |  4 ++
 hw/pci/pci_host.c                   |  6 +++
 tests/avocado/machine_mips_malta.py | 52 +++++++++++++++++--
 5 files changed, 127 insertions(+), 29 deletions(-)

-- 
2.38.1