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[PULL 20/34] target/arm: Fix checkpatch brace errors in helper.c
From: |
Peter Maydell |
Subject: |
[PULL 20/34] target/arm: Fix checkpatch brace errors in helper.c |
Date: |
Thu, 5 Jan 2023 16:44:03 +0000 |
From: Fabiano Rosas <farosas@suse.de>
Fix this:
ERROR: braces {} are necessary for all arms of this statement
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20221213190537.511-4-farosas@suse.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 67 ++++++++++++++++++++++++++++-----------------
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8f1cc2d7cfb..5d8971aa51e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9461,10 +9461,12 @@ void cpsr_write(CPUARMState *env, uint32_t val,
uint32_t mask,
env->CF = (val >> 29) & 1;
env->VF = (val << 3) & 0x80000000;
}
- if (mask & CPSR_Q)
+ if (mask & CPSR_Q) {
env->QF = ((val & CPSR_Q) != 0);
- if (mask & CPSR_T)
+ }
+ if (mask & CPSR_T) {
env->thumb = ((val & CPSR_T) != 0);
+ }
if (mask & CPSR_IT_0_1) {
env->condexec_bits &= ~3;
env->condexec_bits |= (val >> 25) & 3;
@@ -9669,8 +9671,9 @@ static void switch_mode(CPUARMState *env, int mode)
int i;
old_mode = env->uncached_cpsr & CPSR_M;
- if (mode == old_mode)
+ if (mode == old_mode) {
return;
+ }
if (old_mode == ARM_CPU_MODE_FIQ) {
memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t));
@@ -10276,10 +10279,11 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
new_mode = ARM_CPU_MODE_UND;
addr = 0x04;
mask = CPSR_I;
- if (env->thumb)
+ if (env->thumb) {
offset = 2;
- else
+ } else {
offset = 4;
+ }
break;
case EXCP_SWI:
new_mode = ARM_CPU_MODE_SVC;
@@ -11070,10 +11074,11 @@ static inline uint16_t add16_sat(uint16_t a, uint16_t
b)
res = a + b;
if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) {
- if (a & 0x8000)
+ if (a & 0x8000) {
res = 0x8000;
- else
+ } else {
res = 0x7fff;
+ }
}
return res;
}
@@ -11085,10 +11090,11 @@ static inline uint8_t add8_sat(uint8_t a, uint8_t b)
res = a + b;
if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) {
- if (a & 0x80)
+ if (a & 0x80) {
res = 0x80;
- else
+ } else {
res = 0x7f;
+ }
}
return res;
}
@@ -11100,10 +11106,11 @@ static inline uint16_t sub16_sat(uint16_t a, uint16_t
b)
res = a - b;
if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) {
- if (a & 0x8000)
+ if (a & 0x8000) {
res = 0x8000;
- else
+ } else {
res = 0x7fff;
+ }
}
return res;
}
@@ -11115,10 +11122,11 @@ static inline uint8_t sub8_sat(uint8_t a, uint8_t b)
res = a - b;
if (((res ^ a) & 0x80) && ((a ^ b) & 0x80)) {
- if (a & 0x80)
+ if (a & 0x80) {
res = 0x80;
- else
+ } else {
res = 0x7f;
+ }
}
return res;
}
@@ -11136,34 +11144,38 @@ static inline uint16_t add16_usat(uint16_t a,
uint16_t b)
{
uint16_t res;
res = a + b;
- if (res < a)
+ if (res < a) {
res = 0xffff;
+ }
return res;
}
static inline uint16_t sub16_usat(uint16_t a, uint16_t b)
{
- if (a > b)
+ if (a > b) {
return a - b;
- else
+ } else {
return 0;
+ }
}
static inline uint8_t add8_usat(uint8_t a, uint8_t b)
{
uint8_t res;
res = a + b;
- if (res < a)
+ if (res < a) {
res = 0xff;
+ }
return res;
}
static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
{
- if (a > b)
+ if (a > b) {
return a - b;
- else
+ } else {
return 0;
+ }
}
#define ADD16(a, b, n) RESULT(add16_usat(a, b), n, 16);
@@ -11267,10 +11279,11 @@ static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
static inline uint8_t do_usad(uint8_t a, uint8_t b)
{
- if (a > b)
+ if (a > b) {
return a - b;
- else
+ } else {
return b - a;
+ }
}
/* Unsigned sum of absolute byte differences. */
@@ -11290,14 +11303,18 @@ uint32_t HELPER(sel_flags)(uint32_t flags, uint32_t
a, uint32_t b)
uint32_t mask;
mask = 0;
- if (flags & 1)
+ if (flags & 1) {
mask |= 0xff;
- if (flags & 2)
+ }
+ if (flags & 2) {
mask |= 0xff00;
- if (flags & 4)
+ }
+ if (flags & 4) {
mask |= 0xff0000;
- if (flags & 8)
+ }
+ if (flags & 8) {
mask |= 0xff000000;
+ }
return (a & mask) | (b & ~mask);
}
--
2.25.1
- [PULL 16/34] hw/timer/imx_epit: remove explicit fields cnt and freq, (continued)
- [PULL 16/34] hw/timer/imx_epit: remove explicit fields cnt and freq, Peter Maydell, 2023/01/05
- [PULL 17/34] hw/timer/imx_epit: fix compare timer handling, Peter Maydell, 2023/01/05
- [PULL 14/34] hw/timer/imx_epit: hard reset initializes CR with 0, Peter Maydell, 2023/01/05
- [PULL 19/34] target/arm: Fix checkpatch space errors in helper.c, Peter Maydell, 2023/01/05
- [PULL 24/34] hw/input/tsc2xxx: Constify set_transform()'s MouseTransformInfo arg, Peter Maydell, 2023/01/05
- [PULL 25/34] hw/arm/nseries: Constify various read-only arrays, Peter Maydell, 2023/01/05
- [PULL 23/34] target/arm: cleanup cpu includes, Peter Maydell, 2023/01/05
- [PULL 15/34] hw/timer/imx_epit: factor out register write handlers, Peter Maydell, 2023/01/05
- [PULL 21/34] target/arm: Remove unused includes from m_helper.c, Peter Maydell, 2023/01/05
- [PULL 22/34] target/arm: Remove unused includes from helper.c, Peter Maydell, 2023/01/05
- [PULL 20/34] target/arm: Fix checkpatch brace errors in helper.c,
Peter Maydell <=
- [PULL 27/34] target/arm: align exposed ID registers with Linux, Peter Maydell, 2023/01/05
- [PULL 26/34] hw/arm/nseries: Silent -Wmissing-field-initializers warning, Peter Maydell, 2023/01/05
- [PULL 30/34] i.MX7D: Connect GPT timers to IRQ, Peter Maydell, 2023/01/05
- [PULL 33/34] i.MX7D: Connect IRQs to GPIO devices., Peter Maydell, 2023/01/05
- [PULL 11/34] hw/timer/imx_epit: cleanup CR defines, Peter Maydell, 2023/01/05
- [PULL 34/34] hw/net: Fix read of uninitialized memory in imx_fec., Peter Maydell, 2023/01/05
- [PULL 18/34] target/arm: Fix checkpatch comment style warnings in helper.c, Peter Maydell, 2023/01/05
- [PULL 29/34] hw/arm/smmu-common: Avoid using inlined functions with external linkage, Peter Maydell, 2023/01/05
- [PULL 31/34] i.MX7D: Compute clock frequency for the fixed frequency clocks., Peter Maydell, 2023/01/05
- [PULL 28/34] hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope, Peter Maydell, 2023/01/05