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[PATCH 05/18] target/arm: Move CPU QOM type definitions to "hw/arm/cpu.h


From: Philippe Mathieu-Daudé
Subject: [PATCH 05/18] target/arm: Move CPU QOM type definitions to "hw/arm/cpu.h"
Date: Tue, 10 Jan 2023 17:43:53 +0100

Units including "target/arm/cpu.h" can't be built once via meson's
softmmu_ss[] source set. Since this header depends on specific
definitions such the word size (32 or 64-bit), for ARM such units
must go to the per-target arm_ss[].

We want to expose few architectural definitions to hardware models.

Start by exposing the ARM CPU QOM types to files under hw/
via the new "hw/arm/cpu.h" header. Doing so, less HW models
will require access to "target/arm/cpu.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/arm/cpu.h | 28 ++++++++++++++++++++++++++++
 target/arm/cpu-qom.h | 13 +------------
 target/arm/cpu.h     |  8 ++++----
 3 files changed, 33 insertions(+), 16 deletions(-)
 create mode 100644 include/hw/arm/cpu.h

diff --git a/include/hw/arm/cpu.h b/include/hw/arm/cpu.h
new file mode 100644
index 0000000000..0c5d6ca2a8
--- /dev/null
+++ b/include/hw/arm/cpu.h
@@ -0,0 +1,28 @@
+/*
+ * ARM / Aarch64 CPU definitions
+ *
+ * This file contains architectural definitions consumed by hardware models
+ * implementations (files under hw/).
+ * Definitions not required to be exposed to hardware has to go in the
+ * architecture specific "target/arm/cpu.h" header.
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+#ifndef HW_ARM_CPU_H
+#define HW_ARM_CPU_H
+
+#include "hw/core/cpu.h"
+
+#define TYPE_ARM_CPU "arm-cpu"
+OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
+
+#define TYPE_AARCH64_CPU "aarch64-cpu"
+typedef struct AArch64CPUClass AArch64CPUClass;
+DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU, TYPE_AARCH64_CPU)
+
+#define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
+#define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
+
+#endif
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h
index 514c22ced9..b98904b6bc 100644
--- a/target/arm/cpu-qom.h
+++ b/target/arm/cpu-qom.h
@@ -21,16 +21,11 @@
 #define QEMU_ARM_CPU_QOM_H
 
 #include "hw/core/cpu.h"
+#include "hw/arm/cpu.h"
 #include "qom/object.h"
 
 struct arm_boot_info;
 
-#define TYPE_ARM_CPU "arm-cpu"
-
-OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
-
-#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
-
 typedef struct ARMCPUInfo {
     const char *name;
     void (*initfn)(Object *obj);
@@ -57,12 +52,6 @@ struct ARMCPUClass {
     ResettablePhases parent_phases;
 };
 
-
-#define TYPE_AARCH64_CPU "aarch64-cpu"
-typedef struct AArch64CPUClass AArch64CPUClass;
-DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU,
-                       TYPE_AARCH64_CPU)
-
 struct AArch64CPUClass {
     /*< private >*/
     ARMCPUClass parent_class;
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index bf2bce046d..52ac99cad3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef ARM_CPU_H
-#define ARM_CPU_H
+#ifndef TARGET_ARM_CPU_H
+#define TARGET_ARM_CPU_H
 
 #include "kvm-consts.h"
 #include "qemu/cpu-float.h"
@@ -26,6 +26,7 @@
 #include "cpu-qom.h"
 #include "exec/cpu-defs.h"
 #include "qapi/qapi-types-common.h"
+#include "hw/arm/cpu.h"
 
 /* ARM processors have a weak memory model */
 #define TCG_GUEST_DEFAULT_MO      (0)
@@ -2853,11 +2854,10 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync);
 #define ARM_CPUID_TI915T      0x54029152
 #define ARM_CPUID_TI925T      0x54029252
 
-#define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
-#define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
 #define CPU_RESOLVING_TYPE TYPE_ARM_CPU
 
 #define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
+#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
 
 #define cpu_list arm_cpu_list
 
-- 
2.38.1




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