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Re: [PATCH 2/8] hw/pci-bridge/cxl_downstream: Fix type naming mismatch
From: |
Ira Weiny |
Subject: |
Re: [PATCH 2/8] hw/pci-bridge/cxl_downstream: Fix type naming mismatch |
Date: |
Wed, 11 Jan 2023 09:38:18 -0800 |
On Wed, Jan 11, 2023 at 02:24:34PM +0000, Jonathan Cameron wrote:
> Fix capitalization difference between struct name and typedef.
>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
> ---
> hw/pci-bridge/cxl_downstream.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c
> index 3d4e6b59cd..54f507318f 100644
> --- a/hw/pci-bridge/cxl_downstream.c
> +++ b/hw/pci-bridge/cxl_downstream.c
> @@ -15,7 +15,7 @@
> #include "hw/pci/pcie_port.h"
> #include "qapi/error.h"
>
> -typedef struct CXLDownStreamPort {
> +typedef struct CXLDownstreamPort {
> /*< private >*/
> PCIESlot parent_obj;
>
> --
> 2.37.2
>
- [PATCH 0/8] hw/cxl: CXL emulation cleanups and minor fixes for upstream, Jonathan Cameron, 2023/01/11
- [PATCH 1/8] hw/mem/cxl_type3: Improve error handling in realize(), Jonathan Cameron, 2023/01/11
- [PATCH 2/8] hw/pci-bridge/cxl_downstream: Fix type naming mismatch, Jonathan Cameron, 2023/01/11
- [PATCH 3/8] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL, Jonathan Cameron, 2023/01/11
- [PATCH 4/8] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition, Jonathan Cameron, 2023/01/11
- [PATCH 5/8] hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge, Jonathan Cameron, 2023/01/11
- [PATCH 6/8] qemu/bswap: Add const_le64(), Jonathan Cameron, 2023/01/11