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[PULL 38/38] target/arm: allow writes to SCR_EL3.HXEn bit when FEAT_HCX
From: |
Peter Maydell |
Subject: |
[PULL 38/38] target/arm: allow writes to SCR_EL3.HXEn bit when FEAT_HCX is enabled |
Date: |
Fri, 13 Jan 2023 14:11:26 +0000 |
From: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
ARM trusted firmware, when built with FEAT_HCX support, sets SCR_EL3.HXEn bit
to allow EL2 to modify HCRX_EL2 register without trapping it in EL3. Qemu
uses a valid mask to clear unsupported SCR_EL3 bits when emulating SCR_EL3
write, and that mask doesn't include SCR_EL3.HXEn bit even if FEAT_HCX is
enabled and exposed to the guest. As a result EL3 writes of that bit are
ignored.
Cc: qemu-stable@nongnu.org
Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Message-id: 20230105221251.17896-4-eiakovlev@linux.microsoft.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index cee38043540..22ea8fbe368 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1866,6 +1866,9 @@ static void scr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
if (cpu_isar_feature(aa64_sme, cpu)) {
valid_mask |= SCR_ENTP2;
}
+ if (cpu_isar_feature(aa64_hcx, cpu)) {
+ valid_mask |= SCR_HXEN;
+ }
} else {
valid_mask &= ~(SCR_RW | SCR_ST);
if (cpu_isar_feature(aa32_ras, cpu)) {
--
2.34.1
- [PULL 35/38] hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE(), (continued)
- [PULL 35/38] hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE(), Peter Maydell, 2023/01/13
- [PULL 31/38] hw/arm/stellaris: Use CamelCase for STELLARIS_ADC type name, Peter Maydell, 2023/01/13
- [PULL 29/38] hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC type name, Peter Maydell, 2023/01/13
- [PULL 25/38] hw/gpio/omap_gpio: Add local variable to avoid embedded cast, Peter Maydell, 2023/01/13
- [PULL 32/38] hw/arm/bcm2836: Remove definitions generated by OBJECT_DECLARE_TYPE(), Peter Maydell, 2023/01/13
- [PULL 12/38] hw/arm/pxa2xx: Simplify pxa270_init(), Peter Maydell, 2023/01/13
- [PULL 14/38] hw/arm/collie: Simplify flash creation using for() loop, Peter Maydell, 2023/01/13
- [PULL 24/38] hw/arm/pxa: Avoid forward-declaring PXA2xxI2CState, Peter Maydell, 2023/01/13
- [PULL 17/38] hw/arm/mainstone: Use the IEC binary prefix definitions, Peter Maydell, 2023/01/13
- [PULL 22/38] hw/arm/vexpress: Remove dead code in vexpress_common_init(), Peter Maydell, 2023/01/13
- [PULL 38/38] target/arm: allow writes to SCR_EL3.HXEn bit when FEAT_HCX is enabled,
Peter Maydell <=
- [PULL 26/38] hw/arm/omap: Drop useless casts from void * to pointer, Peter Maydell, 2023/01/13
- [PULL 33/38] hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE(), Peter Maydell, 2023/01/13
- [PULL 34/38] hw/misc/sbsa_ec: Rename TYPE_SBSA_EC -> TYPE_SBSA_SECURE_EC, Peter Maydell, 2023/01/13
- [PULL 36/38] hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic', Peter Maydell, 2023/01/13
- Re: [PULL 00/38] target-arm queue, Peter Maydell, 2023/01/13