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[PULL 25/46] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 25/46] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader |
Date: |
Fri, 13 Jan 2023 16:45:11 +0100 |
Linux kernel expects the northbridge & southbridge chipsets
configured by the BIOS firmware. We emulate that by writing
a tiny bootloader code in write_bootloader().
Upon introduction in commit 5c2b87e34d ("PIIX4 support"),
the PIIX4 configuration space included values specific to
the Malta board.
Set the Malta-specific IRQ routing values in the embedded
bootloader, so the next commit can remove the Malta specific
bits from the PIIX4 PCI-ISA bridge and make it generic
(matching the real hardware).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221027204720.33611-3-philmd@linaro.org>
---
hw/mips/malta.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 9fc3280407..ae76b4db70 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -621,6 +621,10 @@ static void network_init(PCIBus *pci_bus)
static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr,
uint64_t kernel_entry)
{
+ static const char pci_pins_cfg[PCI_NUM_PINS] = {
+ 10, 10, 11, 11 /* PIIX IRQRC[A:D] */
+ };
+
/* Bus endianess is always reversed */
#if TARGET_BIG_ENDIAN
#define cpu_to_gt32 cpu_to_le32
@@ -659,6 +663,20 @@ static void bl_setup_gt64120_jump_kernel(void **p,
uint64_t run_addr,
#undef cpu_to_gt32
+ /*
+ * The PIIX ISA bridge is on PCI bus 0 dev 10 func 0.
+ * Load the PIIX IRQC[A:D] routing config address, then
+ * write routing configuration to the config data register.
+ */
+ bl_gen_write_u32(p, /* GT_PCI0_CFGADDR */
+ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcf8),
+ tswap32((1 << 31) /* ConfigEn */
+ | PCI_BUILD_BDF(0, PIIX4_PCI_DEVFN) << 8
+ | PIIX_PIRQCA));
+ bl_gen_write_u32(p, /* GT_PCI0_CFGDATA */
+ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc),
+ tswap32(ldl_be_p(pci_pins_cfg)));
+
bl_gen_jump_kernel(p,
true, ENVP_VADDR - 64,
/*
--
2.38.1
- [PULL 15/46] hw/mips/bootloader: Implement nanoMIPS SW opcode generator, (continued)
- [PULL 15/46] hw/mips/bootloader: Implement nanoMIPS SW opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 16/46] hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 18/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 19/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 20/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 22/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (5/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 23/46] hw/mips/malta: Merge common BL code as bl_setup_gt64120_jump_kernel(), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 24/46] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 25/46] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader,
Philippe Mathieu-Daudé <=
- [PULL 26/46] hw/isa/piix4: Correct IRQRC[A:D] reset values, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 27/46] mips: Remove support for trap and emulate KVM, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 28/46] mips: Always include nanomips disassembler, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 29/46] hw/pci/pci_host: Trace config accesses on unexisting functions, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 30/46] hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs(), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 31/46] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 32/46] hw/isa/piix4: Decouple INTx-to-LNKx routing which is board-specific, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 33/46] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 35/46] hw/intc/i8259: Make using the isa_pic singleton more type-safe, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 34/46] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models, Philippe Mathieu-Daudé, 2023/01/13