Define reg_t based on the actual register width.
Define the inlines using that type. This will allow
input registers to 32-bit insns to be set to 64-bit
values on x86-64, which allows testing various edge cases.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/i386/test-i386-bmi2.c | 182 ++++++++++++++++----------------
1 file changed, 93 insertions(+), 89 deletions(-)
diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi2.c
index 5fadf47510..3c3ef85513 100644
--- a/tests/tcg/i386/test-i386-bmi2.c
+++ b/tests/tcg/i386/test-i386-bmi2.c
@@ -3,34 +3,40 @@
#include <stdint.h>
#include <stdio.h>
+#ifdef __x86_64
+typedef uint64_t reg_t;
+#else
+typedef uint32_t reg_t;
+#endif
+
#define insn1q(name, arg0)
\
-static inline uint64_t name##q(uint64_t arg0)
\
+static inline reg_t name##q(reg_t arg0)
\
{
\
- uint64_t result64;
\
+ reg_t result64;
\
asm volatile (#name "q %1, %0" : "=r"(result64) : "rm"(arg0));
\
return result64;
\
}
#define insn1l(name, arg0) \
-static inline uint32_t name##l(uint32_t arg0)
\
+static inline reg_t name##l(reg_t arg0)
\
{
\
- uint32_t result32;
\
+ reg_t result32;
\
asm volatile (#name "l %k1, %k0" : "=r"(result32) : "rm"(arg0));
\
return result32;
\
}