Re: [PATCH v2 07/22] tcg: Introduce get_jmp_target_addr

[Alex Bennée]

Richard Henderson <richard.henderson@linaro.org> writes:

> Similar to the existing set_jmp_reset_offset.  Include the
> rw->rx address space conversion done by arm and s390x, and
> forgotten by mips and riscv.
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  tcg/tcg.c                  | 9 +++++++++
>  tcg/arm/tcg-target.c.inc   | 2 +-
>  tcg/mips/tcg-target.c.inc  | 2 +-
>  tcg/riscv/tcg-target.c.inc | 2 +-
>  tcg/tci/tcg-target.c.inc   | 2 +-
>  5 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index edd86d6a59..f59f0bfe39 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -322,6 +322,15 @@ static void G_GNUC_UNUSED set_jmp_insn_offset(TCGContext 
> *s, int which)
>      s->tb_jmp_insn_offset[which] = tcg_current_code_size(s);
>  }
>  
> +static uintptr_t G_GNUC_UNUSED get_jmp_target_addr(TCGContext *s, int which)
> +{
> +    /*
> +     * Return the read-execute version of the pointer, for the benefit
> +     * of any pc-relative addressing mode.
> +     */
> +    return (uintptr_t)tcg_splitwx_to_rx(s->tb_jmp_target_addr +
> which);

You could do &s->tb_jmp_target_addr[which] here which you convert to
later anyway. Otherwise:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


> +}
> +
>  /* Signal overflow, starting over with fewer guest insns. */
>  static G_NORETURN
>  void tcg_raise_tb_overflow(TCGContext *s)
> diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
> index 033ff90daa..83b6d77e2e 100644
> --- a/tcg/arm/tcg-target.c.inc
> +++ b/tcg/arm/tcg-target.c.inc
> @@ -1954,7 +1954,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>              TCGReg base = TCG_REG_PC;
>  
>              qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
> -            ptr = (intptr_t)tcg_splitwx_to_rx(s->tb_jmp_target_addr + 
> args[0]);
> +            ptr = get_jmp_target_addr(s, args[0]);
>              dif = tcg_pcrel_diff(s, (void *)ptr) - 8;
>              dil = sextract32(dif, 0, 12);
>              if (dif != dil) {
> diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
> index 02887d7cb1..c30173ab64 100644
> --- a/tcg/mips/tcg-target.c.inc
> +++ b/tcg/mips/tcg-target.c.inc
> @@ -1989,7 +1989,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>          /* indirect jump method */
>          qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
>          tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, TCG_REG_ZERO,
> -                   (uintptr_t)(s->tb_jmp_target_addr + a0));
> +                   get_jmp_target_addr(s, a0));
>          tcg_out_opc_reg(s, OPC_JR, 0, TCG_TMP0, 0);
>          tcg_out_nop(s);
>          set_jmp_reset_offset(s, a0);
> diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
> index b977c8025d..5b2eac6ab8 100644
> --- a/tcg/riscv/tcg-target.c.inc
> +++ b/tcg/riscv/tcg-target.c.inc
> @@ -1314,7 +1314,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>          qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
>          /* indirect jump method */
>          tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_REG_ZERO,
> -                   (uintptr_t)(s->tb_jmp_target_addr + a0));
> +                   get_jmp_target_addr(s, a0));
>          tcg_out_opc_imm(s, OPC_JALR, TCG_REG_ZERO, TCG_REG_TMP0, 0);
>          set_jmp_reset_offset(s, a0);
>          break;
> diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
> index ad356f1875..59daffc0a0 100644
> --- a/tcg/tci/tcg-target.c.inc
> +++ b/tcg/tci/tcg-target.c.inc
> @@ -605,7 +605,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>      case INDEX_op_goto_tb:
>          qemu_build_assert(!TCG_TARGET_HAS_direct_jump);
>          /* indirect jump method. */
> -        tcg_out_op_p(s, opc, s->tb_jmp_target_addr + args[0]);
> +        tcg_out_op_p(s, opc, (void *)get_jmp_target_addr(s, args[0]));
>          set_jmp_reset_offset(s, args[0]);
>          break;


-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro