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[PULL v2 08/15] target/loongarch: Disassemble pcadd* addresses
From: |
Richard Henderson |
Subject: |
[PULL v2 08/15] target/loongarch: Disassemble pcadd* addresses |
Date: |
Mon, 23 Jan 2023 16:05:00 -1000 |
Print both the raw field and the resolved pc-relative
address, as we do for branches.
Reviewed-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/disas.c | 37 +++++++++++++++++++++++++++++++++----
1 file changed, 33 insertions(+), 4 deletions(-)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 7cffd853ec..2e93e77e0d 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -519,10 +519,6 @@ INSN(fsel, fffc)
INSN(addu16i_d, rr_i)
INSN(lu12i_w, r_i)
INSN(lu32i_d, r_i)
-INSN(pcaddi, r_i)
-INSN(pcalau12i, r_i)
-INSN(pcaddu12i, r_i)
-INSN(pcaddu18i, r_i)
INSN(ll_w, rr_i)
INSN(sc_w, rr_i)
INSN(ll_d, rr_i)
@@ -755,3 +751,36 @@ static bool trans_fcmp_cond_##suffix(DisasContext *ctx, \
FCMP_INSN(s)
FCMP_INSN(d)
+
+#define PCADD_INSN(name) \
+static bool trans_##name(DisasContext *ctx, arg_##name *a) \
+{ \
+ output(ctx, #name, "r%d, %d # 0x%" PRIx64, \
+ a->rd, a->imm, gen_##name(ctx->pc, a->imm)); \
+ return true; \
+}
+
+static uint64_t gen_pcaddi(uint64_t pc, int imm)
+{
+ return pc + (imm << 2);
+}
+
+static uint64_t gen_pcalau12i(uint64_t pc, int imm)
+{
+ return (pc + (imm << 12)) & ~0xfff;
+}
+
+static uint64_t gen_pcaddu12i(uint64_t pc, int imm)
+{
+ return pc + (imm << 12);
+}
+
+static uint64_t gen_pcaddu18i(uint64_t pc, int imm)
+{
+ return pc + ((uint64_t)(imm) << 18);
+}
+
+PCADD_INSN(pcaddi)
+PCADD_INSN(pcalau12i)
+PCADD_INSN(pcaddu12i)
+PCADD_INSN(pcaddu18i)
--
2.34.1
- [PULL v2 00/15] tcg patch queue, Richard Henderson, 2023/01/23
- [PULL v2 02/15] tcg/arm: Use register pair allocation for qemu_{ld, st}_i64, Richard Henderson, 2023/01/23
- [PULL v2 01/15] tcg: Avoid recursion in tcg_gen_mulu2_i32, Richard Henderson, 2023/01/23
- [PULL v2 03/15] common-user/host/ppc: Implement safe-syscall.inc.S, Richard Henderson, 2023/01/23
- [PULL v2 04/15] linux-user: Implment host/ppc/host-signal.h, Richard Henderson, 2023/01/23
- [PULL v2 05/15] tcg: Mark tcg helpers noinline to avoid an issue with LTO, Richard Henderson, 2023/01/23
- [PULL v2 07/15] target/loongarch: Disassemble jirl properly, Richard Henderson, 2023/01/23
- [PULL v2 06/15] target/loongarch: Enable the disassembler for host tcg, Richard Henderson, 2023/01/23
- [PULL v2 08/15] target/loongarch: Disassemble pcadd* addresses,
Richard Henderson <=
- [PULL v2 09/15] tcg/loongarch64: Optimize immediate loading, Richard Henderson, 2023/01/23
- [PULL v2 10/15] tcg/loongarch64: Update tcg-insn-defs.c.inc, Richard Henderson, 2023/01/23
- [PULL v2 11/15] tcg/loongarch64: Introduce tcg_out_addi, Richard Henderson, 2023/01/23
- [PULL v2 12/15] tcg/loongarch64: Improve setcond expansion, Richard Henderson, 2023/01/23
- [PULL v2 13/15] tcg/loongarch64: Implement movcond, Richard Henderson, 2023/01/23
- [PULL v2 14/15] tcg/loongarch64: Use tcg_pcrel_diff in tcg_out_ldst, Richard Henderson, 2023/01/23
- [PULL v2 15/15] tcg/loongarch64: Reorg goto_tb implementation, Richard Henderson, 2023/01/23