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Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode
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From: |
Alexandre Ghiti |
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Subject: |
Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode |
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Date: |
Tue, 24 Jan 2023 11:00:14 +0100 |
On Mon, Jan 23, 2023 at 11:29 AM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote:
> ...
> > +/* Sets the satp mode to the max supported */
> > +static void set_satp_mode_default(RISCVCPU *cpu, bool is_32_bit)
> > +{
>
> nit: When passing in the cpu object pointer there's no need to also pass
> is_32_bit, we can just use it from the pointer, cpu->env.misa_mxl == MXL_RV32
Ok
Thanks,
Alex
>
> Thanks,
> drew
- [PATCH v6 1/5] riscv: Pass Object to register_cpu_props instead of DeviceState, (continued)
- [PATCH v6 1/5] riscv: Pass Object to register_cpu_props instead of DeviceState, Alexandre Ghiti, 2023/01/23
- [PATCH v6 2/5] riscv: Change type of valid_vm_1_10_[32|64] to bool, Alexandre Ghiti, 2023/01/23
- [PATCH v6 3/5] riscv: Allow user to set the satp mode, Alexandre Ghiti, 2023/01/23
- [PATCH v6 4/5] riscv: Correctly set the device-tree entry 'mmu-type', Alexandre Ghiti, 2023/01/23
- [PATCH v6 5/5] riscv: Introduce satp mode hw capabilities, Alexandre Ghiti, 2023/01/23
- Re: [PATCH v6 5/5] riscv: Introduce satp mode hw capabilities, Alexandre Ghiti, 2023/01/24
- Re: [PATCH v6 5/5] riscv: Introduce satp mode hw capabilities, Andrew Jones, 2023/01/24