[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 7/7] hw/acpi/core: Trace enable and status registers of GPE s
From: |
Igor Mammedov |
Subject: |
Re: [PATCH 7/7] hw/acpi/core: Trace enable and status registers of GPE separately |
Date: |
Wed, 25 Jan 2023 17:17:07 +0100 |
On Sun, 22 Jan 2023 18:07:24 +0100
Bernhard Beschow <shentey@gmail.com> wrote:
> The bit positions of both registers are related. Tracing the registers
> independently results in the same offsets across these registers which
> eases debugging.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
> ---
> hw/acpi/core.c | 10 +++++++---
> hw/acpi/trace-events | 6 ++++--
> 2 files changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/hw/acpi/core.c b/hw/acpi/core.c
> index a33e410e69..cc33605d61 100644
> --- a/hw/acpi/core.c
> +++ b/hw/acpi/core.c
> @@ -687,13 +687,13 @@ void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t
> addr, uint32_t val)
> {
> uint8_t *cur;
>
> - trace_acpi_gpe_ioport_writeb(addr, val);
> -
> cur = acpi_gpe_ioport_get_ptr(ar, addr);
> if (addr < ar->gpe.len / 2) {
> + trace_acpi_gpe_sts_ioport_writeb(addr, val);
> /* GPE_STS */
> *cur = (*cur) & ~val;
> } else if (addr < ar->gpe.len) {
> + trace_acpi_gpe_en_ioport_writeb(addr - (ar->gpe.len / 2), val);
> /* GPE_EN */
> *cur = val;
> } else {
> @@ -712,7 +712,11 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t
> addr)
> val = *cur;
> }
>
> - trace_acpi_gpe_ioport_readb(addr, val);
> + if (addr < ar->gpe.len / 2) {
> + trace_acpi_gpe_sts_ioport_readb(addr, val);
> + } else {
> + trace_acpi_gpe_en_ioport_readb(addr - (ar->gpe.len / 2), val);
> + }
>
> return val;
> }
> diff --git a/hw/acpi/trace-events b/hw/acpi/trace-events
> index 159937ddb9..d387adfb0b 100644
> --- a/hw/acpi/trace-events
> +++ b/hw/acpi/trace-events
> @@ -18,8 +18,10 @@ mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"]
> pc-dimm deleted"
> mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm
> delete failed"
>
> # core.c
> -acpi_gpe_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==>
> 0x%" PRIx8
> -acpi_gpe_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <==
> 0x%" PRIx8
> +acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 "
> ==> 0x%" PRIx8
> +acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 "
> ==> 0x%" PRIx8
> +acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 "
> <== 0x%" PRIx8
> +acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 "
> <== 0x%" PRIx8
>
> # cpu.c
> cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32
- Re: [PATCH 3/7] hw/acpi/{ich9,piix4}: Resolve redundant io_base address attributes, (continued)
[PATCH 4/7] hw/acpi/ich9: Use ICH9_PMIO_GPE0_STS just once, Bernhard Beschow, 2023/01/22
[PATCH 5/7] hw/acpi/piix4: Fix offset of GPE0 registers, Bernhard Beschow, 2023/01/22
[PATCH 6/7] hw/acpi: Trace GPE access in all device models, not just PIIX4, Bernhard Beschow, 2023/01/22
[PATCH 7/7] hw/acpi/core: Trace enable and status registers of GPE separately, Bernhard Beschow, 2023/01/22
- Re: [PATCH 7/7] hw/acpi/core: Trace enable and status registers of GPE separately,
Igor Mammedov <=
Re: [PATCH 0/7] ACPI controller cleanup, Igor Mammedov, 2023/01/25