Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 36..63.
Of these, some correspond to RAS registers which we implement as
always-UNDEF: these don't need any extra handling for FGT because the
UNDEF-to-EL1 always takes priority over any theoretical
FGT-trap-to-EL2.
Bit 50 (NACCDATA_EL1) is for the ACCDATA_EL1 register which is part
of the FEAT_LS64_ACCDATA feature which we don't yet implement.
Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
target/arm/cpregs.h | 7 +++++++
hw/intc/arm_gicv3_cpuif.c | 2 ++
target/arm/helper.c | 10 ++++++++++
3 files changed, 19 insertions(+)