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[PATCH 27/84] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL
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From: |
Richard Henderson |
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Subject: |
[PATCH 27/84] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL |
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Date: |
Wed, 3 May 2023 08:22:34 +0100 |
All uses replaced with TCGContext.addr_type.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 000c2f66db..77f7919880 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1747,6 +1747,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
TCGReg addr_reg, MemOpIdx oi,
bool is_ld)
{
+ TCGType addr_type = s->addr_type;
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
MemOp atom_u;
@@ -1790,7 +1791,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tgen_andi_risbg(s, TCG_REG_R0, addr_reg, tlb_mask);
} else {
tcg_out_insn(s, RX, LA, TCG_REG_R0, addr_reg, TCG_REG_NONE, a_off);
- tgen_andi(s, TCG_TYPE_TL, TCG_REG_R0, tlb_mask);
+ tgen_andi(s, addr_type, TCG_REG_R0, tlb_mask);
}
if (is_ld) {
@@ -1798,7 +1799,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
} else {
ofs = offsetof(CPUTLBEntry, addr_write);
}
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_insn(s, RX, C, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs);
} else {
tcg_out_insn(s, RXY, CG, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs);
@@ -1811,7 +1812,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_insn(s, RXY, LG, h->index, TCG_TMP0, TCG_REG_NONE,
offsetof(CPUTLBEntry, addend));
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_insn(s, RRE, ALGFR, h->index, addr_reg);
h->base = TCG_REG_NONE;
} else {
@@ -1834,7 +1835,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
}
h->base = addr_reg;
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_ext32u(s, TCG_TMP0, addr_reg);
h->base = TCG_TMP0;
}
--
2.34.1
- [PATCH 18/84] tcg/i386: Adjust type of tlb_mask, (continued)
- [PATCH 18/84] tcg/i386: Adjust type of tlb_mask, Richard Henderson, 2023/05/03
- [PATCH 28/84] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 22/84] tcg/aarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 20/84] tcg/arm: Remove TARGET_LONG_BITS, Richard Henderson, 2023/05/03
- [PATCH 24/84] tcg/mips: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 25/84] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 27/84] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL,
Richard Henderson <=
- [PATCH 30/84] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h, Richard Henderson, 2023/05/03
- [PATCH 09/84] tcg: Reduce copies for plugin_gen_mem_callbacks, Richard Henderson, 2023/05/03
- [PATCH 14/84] tcg: Split INDEX_op_qemu_{ld, st}* for guest address size, Richard Henderson, 2023/05/03
- [PATCH 36/84] tcg: Split out tcg/debug-assert.h, Richard Henderson, 2023/05/03
- [PATCH 38/84] *: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/05/03
- [PATCH 13/84] tcg: Remove TCGv from tcg_gen_atomic_*, Richard Henderson, 2023/05/03
- [PATCH 16/84] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32, Richard Henderson, 2023/05/03