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[PATCH 23/84] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL
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From: |
Richard Henderson |
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Subject: |
[PATCH 23/84] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL |
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Date: |
Wed, 3 May 2023 08:22:30 +0100 |
All uses replaced with TCGContext.addr_type.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index ea5f2a8f00..2e2428bc30 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -845,6 +845,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
TCGReg addr_reg, MemOpIdx oi,
bool is_ld)
{
+ TCGType addr_type = s->addr_type;
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
MemOp a_bits, atom_u;
@@ -876,7 +877,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
/* Load the tlb comparator and the addend. */
- tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_TMP0, TCG_REG_TMP2,
+ tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2,
is_ld ? offsetof(CPUTLBEntry, addr_read)
: offsetof(CPUTLBEntry, addr_write));
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2,
@@ -890,9 +891,9 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
if (a_bits < s_bits) {
unsigned a_mask = (1u << a_bits) - 1;
unsigned s_mask = (1u << s_bits) - 1;
- tcg_out_addi(s, TCG_TYPE_TL, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
+ tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
} else {
- tcg_out_mov(s, TCG_TYPE_TL, TCG_REG_TMP1, addr_reg);
+ tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg);
}
tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO,
a_bits, TARGET_PAGE_BITS - 1);
@@ -925,7 +926,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
h->index = USE_GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_ZERO;
#endif
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
h->base = TCG_REG_TMP0;
tcg_out_ext32u(s, h->base, addr_reg);
} else {
--
2.34.1
- [PATCH 14/84] tcg: Split INDEX_op_qemu_{ld, st}* for guest address size, (continued)
- [PATCH 14/84] tcg: Split INDEX_op_qemu_{ld, st}* for guest address size, Richard Henderson, 2023/05/03
- [PATCH 36/84] tcg: Split out tcg/debug-assert.h, Richard Henderson, 2023/05/03
- [PATCH 38/84] *: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/05/03
- [PATCH 13/84] tcg: Remove TCGv from tcg_gen_atomic_*, Richard Henderson, 2023/05/03
- [PATCH 16/84] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32, Richard Henderson, 2023/05/03
- [PATCH 03/84] accel/tcg: Widen tcg-ldst.h addresses to uint64_t, Richard Henderson, 2023/05/03
- [PATCH 23/84] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL,
Richard Henderson <=
- [PATCH 26/84] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 21/84] tcg/aarch64: Remove USE_GUEST_BASE, Richard Henderson, 2023/05/03
- [PATCH 29/84] tcg: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 32/84] tcg: Add tlb_dyn_max_bits to TCGContext, Richard Henderson, 2023/05/03
- [PATCH 35/84] tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS, Richard Henderson, 2023/05/03
- [PATCH 39/84] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/05/03