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[PATCH 32/84] tcg: Add tlb_dyn_max_bits to TCGContext
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From: |
Richard Henderson |
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Subject: |
[PATCH 32/84] tcg: Add tlb_dyn_max_bits to TCGContext |
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Date: |
Wed, 3 May 2023 08:22:39 +0100 |
Disconnect guest tlb parameters from TCG compilation.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 1 +
accel/tcg/translate-all.c | 1 +
tcg/aarch64/tcg-target.c.inc | 2 +-
tcg/i386/tcg-target.c.inc | 2 +-
4 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index c507b0d653..719d719b58 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -556,6 +556,7 @@ struct TCGContext {
#ifdef CONFIG_SOFTMMU
int page_mask;
uint8_t page_bits;
+ uint8_t tlb_dyn_max_bits;
#endif
TCGRegSet reserved_regs;
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 12d7febfee..f6c8ad1a18 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -360,6 +360,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
#ifdef CONFIG_SOFTMMU
tcg_ctx->page_bits = TARGET_PAGE_BITS;
tcg_ctx->page_mask = TARGET_PAGE_MASK;
+ tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
#endif
tb_overflow:
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 3819d15563..fa8f3a7629 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1687,7 +1687,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
ldst->oi = oi;
ldst->addrlo_reg = addr_reg;
- mask_type = (s->page_bits + CPU_TLB_DYN_MAX_BITS > 32
+ mask_type = (s->page_bits + s->tlb_dyn_max_bits > 32
? TCG_TYPE_I64 : TCG_TYPE_I32);
/* Load env_tlb(env)->f[mmu_idx].{mask,table} into {x0,x1}. */
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 5f1c23b2a5..9eb4ae15b6 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1975,7 +1975,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
trexw = (ttype == TCG_TYPE_I32 ? 0 : P_REXW);
if (TCG_TYPE_PTR == TCG_TYPE_I64) {
hrexw = P_REXW;
- if (s->page_bits + CPU_TLB_DYN_MAX_BITS > 32) {
+ if (s->page_bits + s->tlb_dyn_max_bits > 32) {
tlbtype = TCG_TYPE_I64;
tlbrexw = P_REXW;
}
--
2.34.1
- Re: [PATCH 16/84] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32, (continued)
- [PATCH 03/84] accel/tcg: Widen tcg-ldst.h addresses to uint64_t, Richard Henderson, 2023/05/03
- [PATCH 23/84] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 26/84] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 21/84] tcg/aarch64: Remove USE_GUEST_BASE, Richard Henderson, 2023/05/03
- [PATCH 29/84] tcg: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 32/84] tcg: Add tlb_dyn_max_bits to TCGContext,
Richard Henderson <=
- [PATCH 35/84] tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS, Richard Henderson, 2023/05/03
- [PATCH 39/84] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/05/03
- [PATCH 33/84] tcg: Widen CPUTLBEntry comparators to 64-bits, Richard Henderson, 2023/05/03
- [PATCH 11/84] tcg: Add addr_type to TCGContext, Richard Henderson, 2023/05/03
- [PATCH 31/84] tcg: Add page_bits and page_mask to TCGContext, Richard Henderson, 2023/05/03
- [PATCH 37/84] *: Add missing includes of qemu/error-report.h, Richard Henderson, 2023/05/03
- [PATCH 34/84] tcg: Add tlb_fast_offset to TCGContext, Richard Henderson, 2023/05/03