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[PATCH 21/84] tcg/aarch64: Remove USE_GUEST_BASE
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From: |
Richard Henderson |
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Subject: |
[PATCH 21/84] tcg/aarch64: Remove USE_GUEST_BASE |
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Date: |
Wed, 3 May 2023 08:22:28 +0100 |
Eliminate the test vs TARGET_LONG_BITS by considering this
predicate to be always true, and simplify accordingly.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.c.inc | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index dc448f3f4b..fa1e5fb4ec 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -85,11 +85,6 @@ bool have_lse2;
#define TCG_VEC_TMP0 TCG_REG_V31
#ifndef CONFIG_SOFTMMU
-/* Note that XZR cannot be encoded in the address base register slot,
- as that actaully encodes SP. So if we need to zero-extend the guest
- address, via the address index register slot, we need to load even
- a zero guest base into a register. */
-#define USE_GUEST_BASE (guest_base != 0 || TARGET_LONG_BITS == 32)
#define TCG_REG_GUEST_BASE TCG_REG_X28
#endif
@@ -1762,7 +1757,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0);
}
- if (USE_GUEST_BASE) {
+ if (guest_base || addr_type == TCG_TYPE_I32) {
h->base = TCG_REG_GUEST_BASE;
h->index = addr_reg;
h->index_ext = addr_type;
@@ -3176,10 +3171,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)
CPU_TEMP_BUF_NLONGS * sizeof(long));
#if !defined(CONFIG_SOFTMMU)
- if (USE_GUEST_BASE) {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base);
- tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
- }
+ /*
+ * Note that XZR cannot be encoded in the address base register slot,
+ * as that actaully encodes SP. Depending on the guest, we may need
+ * to zero-extend the guest address via the address index register slot,
+ * therefore we need to load even a zero guest base into a register.
+ */
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
#endif
tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
--
2.34.1
- [PATCH 38/84] *: Add missing includes of tcg/debug-assert.h, (continued)
- [PATCH 38/84] *: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/05/03
- [PATCH 13/84] tcg: Remove TCGv from tcg_gen_atomic_*, Richard Henderson, 2023/05/03
- [PATCH 16/84] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32, Richard Henderson, 2023/05/03
- [PATCH 03/84] accel/tcg: Widen tcg-ldst.h addresses to uint64_t, Richard Henderson, 2023/05/03
- [PATCH 23/84] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 26/84] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 21/84] tcg/aarch64: Remove USE_GUEST_BASE,
Richard Henderson <=
- [PATCH 29/84] tcg: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/03
- [PATCH 32/84] tcg: Add tlb_dyn_max_bits to TCGContext, Richard Henderson, 2023/05/03
- [PATCH 35/84] tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS, Richard Henderson, 2023/05/03
- [PATCH 39/84] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/05/03
- [PATCH 33/84] tcg: Widen CPUTLBEntry comparators to 64-bits, Richard Henderson, 2023/05/03
- [PATCH 11/84] tcg: Add addr_type to TCGContext, Richard Henderson, 2023/05/03