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[PULL 48/53] tcg: Remove TARGET_ALIGNED_ONLY
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From: |
Richard Henderson |
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Subject: |
[PULL 48/53] tcg: Remove TARGET_ALIGNED_ONLY |
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Date: |
Thu, 11 May 2023 09:04:45 +0100 |
All uses have now been expunged.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/memop.h | 13 ++-----------
include/exec/poison.h | 1 -
tcg/tcg.c | 5 -----
3 files changed, 2 insertions(+), 17 deletions(-)
diff --git a/include/exec/memop.h b/include/exec/memop.h
index 25d027434a..07f5f88188 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -47,8 +47,6 @@ typedef enum MemOp {
* MO_UNALN accesses are never checked for alignment.
* MO_ALIGN accesses will result in a call to the CPU's
* do_unaligned_access hook if the guest address is not aligned.
- * The default depends on whether the target CPU defines
- * TARGET_ALIGNED_ONLY.
*
* Some architectures (e.g. ARMv8) need the address which is aligned
* to a size more than the size of the memory access.
@@ -65,21 +63,14 @@ typedef enum MemOp {
*/
MO_ASHIFT = 5,
MO_AMASK = 0x7 << MO_ASHIFT,
-#ifdef NEED_CPU_H
-#ifdef TARGET_ALIGNED_ONLY
- MO_ALIGN = 0,
- MO_UNALN = MO_AMASK,
-#else
- MO_ALIGN = MO_AMASK,
- MO_UNALN = 0,
-#endif
-#endif
+ MO_UNALN = 0,
MO_ALIGN_2 = 1 << MO_ASHIFT,
MO_ALIGN_4 = 2 << MO_ASHIFT,
MO_ALIGN_8 = 3 << MO_ASHIFT,
MO_ALIGN_16 = 4 << MO_ASHIFT,
MO_ALIGN_32 = 5 << MO_ASHIFT,
MO_ALIGN_64 = 6 << MO_ASHIFT,
+ MO_ALIGN = MO_AMASK,
/* Combinations of the above, for ease of use. */
MO_UB = MO_8,
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 140daa4a85..256736e11a 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -35,7 +35,6 @@
#pragma GCC poison TARGET_TRICORE
#pragma GCC poison TARGET_XTENSA
-#pragma GCC poison TARGET_ALIGNED_ONLY
#pragma GCC poison TARGET_HAS_BFLT
#pragma GCC poison TARGET_NAME
#pragma GCC poison TARGET_SUPPORTS_MTTCG
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 88fe01f59f..1231c8ab4c 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2185,13 +2185,8 @@ static const char * const ldst_name[] =
};
static const char * const alignment_name[(MO_AMASK >> MO_ASHIFT) + 1] = {
-#ifdef TARGET_ALIGNED_ONLY
[MO_UNALN >> MO_ASHIFT] = "un+",
- [MO_ALIGN >> MO_ASHIFT] = "",
-#else
- [MO_UNALN >> MO_ASHIFT] = "",
[MO_ALIGN >> MO_ASHIFT] = "al+",
-#endif
[MO_ALIGN_2 >> MO_ASHIFT] = "al2+",
[MO_ALIGN_4 >> MO_ASHIFT] = "al4+",
[MO_ALIGN_8 >> MO_ASHIFT] = "al8+",
--
2.34.1
- [PULL 03/53] disas: Fix tabs and braces in disas.c, (continued)
- [PULL 03/53] disas: Fix tabs and braces in disas.c, Richard Henderson, 2023/05/11
- [PULL 35/53] tcg/ppc: Adjust constraints on qemu_ld/st, Richard Henderson, 2023/05/11
- [PULL 37/53] tcg/ppc: Remove unused constraint J, Richard Henderson, 2023/05/11
- [PULL 32/53] tcg/mips: Reorg tlb load within prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 40/53] tcg/s390x: Simplify constraints on qemu_ld/st, Richard Henderson, 2023/05/11
- [PULL 42/53] target/mips: Add missing default_tcg_memop_mask, Richard Henderson, 2023/05/11
- [PULL 41/53] target/mips: Add MO_ALIGN to gen_llwp, gen_scwp, Richard Henderson, 2023/05/11
- [PULL 44/53] target/mips: Remove TARGET_ALIGNED_ONLY, Richard Henderson, 2023/05/11
- [PULL 43/53] target/mips: Use MO_ALIGN instead of 0, Richard Henderson, 2023/05/11
- [PULL 45/53] target/nios2: Remove TARGET_ALIGNED_ONLY, Richard Henderson, 2023/05/11
- [PULL 48/53] tcg: Remove TARGET_ALIGNED_ONLY,
Richard Henderson <=
- [PULL 47/53] target/sh4: Remove TARGET_ALIGNED_ONLY, Richard Henderson, 2023/05/11
- [PULL 46/53] target/sh4: Use MO_ALIGN where required, Richard Henderson, 2023/05/11
- [PULL 49/53] accel/tcg: Add cpu_in_serial_context, Richard Henderson, 2023/05/11
- [PULL 51/53] accel/tcg: Reorg system mode load helpers, Richard Henderson, 2023/05/11
- [PULL 52/53] accel/tcg: Reorg system mode store helpers, Richard Henderson, 2023/05/11
- [PULL 53/53] target/loongarch: Do not include tcg-ldst.h, Richard Henderson, 2023/05/11
- [PULL 50/53] accel/tcg: Introduce tlb_read_idx, Richard Henderson, 2023/05/11