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Re: [PATCH v2 3/3] target/openrisc: Setup FPU for detecting tininess bef


From: Stafford Horne
Subject: Re: [PATCH v2 3/3] target/openrisc: Setup FPU for detecting tininess before rounding
Date: Thu, 11 May 2023 15:33:04 +0100

On Wed, May 10, 2023 at 05:16:20PM +0100, Richard Henderson wrote:
> On 5/10/23 16:32, Stafford Horne wrote:
> > OpenRISC defines tininess to be detected before rounding.  Setup qemu to
> > obey this.
> > 
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> > Since v1:
> >   - Remove setting default NaN behavior.  I discussed with the FPU 
> > developers and
> >     they mentioned the OpenRISC hardware should be IEEE compliant when 
> > handling
> >     and forwarding NaN payloads, and they don't want try change this.
> 
> There is no such thing as IEEE compliant for NaN payloads.
> All of that is implementation defined.

I see, I haven't yet seen to IEEE 754 spec so I don't know how much is covered.
It was incorrect to assume forwarding semantics was covered.

> All OpenRISC needs to do is document its intentions (and then double-check
> that fpu/softfloat-specialize.c.inc does what is documented).

Understood, that makes sense, also reading that code I see how all other
architectures are able to ifdef their way to a specific behavior.  I will see
what our current implementions do and update the spec and qemu as a separate
task.

> 
> Anyway, back to this patch,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> :-)

Thank you ^_^

-Stafford



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