[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 03/20] target/arm: Pull calls to disas_sve() and disas_sme() out
|
From: |
Peter Maydell |
|
Subject: |
[PATCH 03/20] target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder |
|
Date: |
Fri, 12 May 2023 15:40:49 +0100 |
The SVE and SME decode is already done by decodetree. Pull the calls
to these decoders out of the legacy decoder. This doesn't change
behaviour because all the patterns in sve.decode and sme.decode
already require the bits that the legacy decoder is decoding to have
the correct values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/translate-a64.c | 20 ++++----------------
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 7862e9dd4e3..2845febb713 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -14205,19 +14205,6 @@ static bool btype_destination_ok(uint32_t insn, bool
bt, int btype)
static void disas_a64_legacy(DisasContext *s, uint32_t insn)
{
switch (extract32(insn, 25, 4)) {
- case 0x0:
- if (!extract32(insn, 31, 1) || !disas_sme(s, insn)) {
- unallocated_encoding(s);
- }
- break;
- case 0x1: case 0x3: /* UNALLOCATED */
- unallocated_encoding(s);
- break;
- case 0x2:
- if (!disas_sve(s, insn)) {
- unallocated_encoding(s);
- }
- break;
case 0x8: case 0x9: /* Data processing - immediate */
disas_data_proc_imm(s, insn);
break;
@@ -14239,7 +14226,7 @@ static void disas_a64_legacy(DisasContext *s, uint32_t
insn)
disas_data_proc_simd_fp(s, insn);
break;
default:
- assert(FALSE); /* all 15 cases should be handled above */
+ unallocated_encoding(s);
break;
}
}
@@ -14445,8 +14432,9 @@ static void aarch64_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
disas_sme_fa64(s, insn);
}
-
- if (!disas_a64(s, insn)) {
+ if (!disas_a64(s, insn) &&
+ !disas_sme(s,insn) &&
+ !disas_sve(s, insn)) {
disas_a64_legacy(s, insn);
}
--
2.34.1
- [PATCH 00/20] target/arm: Start conversion of A64 decoder to decodetree, Peter Maydell, 2023/05/12
- [PATCH 01/20] target/arm: Split out disas_a64_legacy, Peter Maydell, 2023/05/12
- [PATCH 02/20] target/arm: Create decodetree skeleton for A64, Peter Maydell, 2023/05/12
- [PATCH 04/20] target/arm: Convert PC-rel addressing to decodetree, Peter Maydell, 2023/05/12
- [PATCH 05/20] target/arm: Split gen_add_CC and gen_sub_CC, Peter Maydell, 2023/05/12
- [PATCH 03/20] target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder,
Peter Maydell <=
- [PATCH 07/20] target/arm: Convert Add/subtract (immediate with tags) to decodetree, Peter Maydell, 2023/05/12
- [PATCH 06/20] target/arm: Convert Add/subtract (immediate) to decodetree, Peter Maydell, 2023/05/12
- [PATCH 08/20] target/arm: Replace bitmask64 with MAKE_64BIT_MASK, Peter Maydell, 2023/05/12
- [PATCH 09/20] target/arm: Convert Logical (immediate) to decodetree, Peter Maydell, 2023/05/12
- [PATCH 10/20] target/arm: Convert Move wide (immediate) to decodetree, Peter Maydell, 2023/05/12
- [PATCH 11/20] target/arm: Convert Bitfield to decodetree, Peter Maydell, 2023/05/12
- [PATCH 12/20] target/arm: Convert Extract instructions to decodetree, Peter Maydell, 2023/05/12
- [PATCH 13/20] target/arm: Convert unconditional branch immediate to decodetree, Peter Maydell, 2023/05/12