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[PULL 68/80] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32
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From: |
Richard Henderson |
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Subject: |
[PULL 68/80] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32 |
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Date: |
Tue, 16 May 2023 12:41:33 -0700 |
Keep all 32-bit values zero extended in the register, not solely when
addresses are 32 bits. This eliminates a dependency on TARGET_LONG_BITS.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 7f69997e30..7ebd6e5135 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -154,9 +154,9 @@ extern bool have_atomic16;
#define TCG_TARGET_HAS_mulsh_i32 0
#if TCG_TARGET_REG_BITS == 64
-/* Keep target addresses zero-extended in a register. */
-#define TCG_TARGET_HAS_extrl_i64_i32 (TARGET_LONG_BITS == 32)
-#define TCG_TARGET_HAS_extrh_i64_i32 (TARGET_LONG_BITS == 32)
+/* Keep 32-bit values zero-extended in a register. */
+#define TCG_TARGET_HAS_extrl_i64_i32 1
+#define TCG_TARGET_HAS_extrh_i64_i32 1
#define TCG_TARGET_HAS_div2_i64 1
#define TCG_TARGET_HAS_rot_i64 1
#define TCG_TARGET_HAS_ext8s_i64 1
--
2.34.1
- [PULL 40/80] tcg/arm: Use atom_and_align_for_opc, (continued)
- [PULL 40/80] tcg/arm: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 41/80] tcg/loongarch64: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 42/80] tcg/mips: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 44/80] tcg/riscv: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 46/80] tcg/sparc64: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 45/80] tcg/s390x: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 47/80] tcg/i386: Honor 64-bit atomicity in 32-bit mode, Richard Henderson, 2023/05/16
- [PULL 52/80] tcg/s390x: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 65/80] tcg: Remove TCGv from tcg_gen_atomic_*, Richard Henderson, 2023/05/16
- [PULL 64/80] tcg: Remove TCGv from tcg_gen_qemu_{ld,st}_*, Richard Henderson, 2023/05/16
- [PULL 68/80] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32,
Richard Henderson <=
- [PULL 74/80] tcg/aarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 56/80] tcg: Widen helper_{ld,st}_i128 addresses to uint64_t, Richard Henderson, 2023/05/16
- [PULL 61/80] tcg: Reduce copies for plugin_gen_mem_callbacks, Richard Henderson, 2023/05/16
- [PULL 43/80] tcg/ppc: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 48/80] tcg/i386: Support 128-bit load/store with have_atomic16, Richard Henderson, 2023/05/16
- [PULL 50/80] tcg/aarch64: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 58/80] tcg: Widen tcg_gen_code pc_start argument to uint64_t, Richard Henderson, 2023/05/16
- [PULL 49/80] tcg/aarch64: Rename temporaries, Richard Henderson, 2023/05/16
- [PULL 51/80] tcg/ppc: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 55/80] accel/tcg: Widen tcg-ldst.h addresses to uint64_t, Richard Henderson, 2023/05/16