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[PULL 73/80] tcg/aarch64: Remove USE_GUEST_BASE
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From: |
Richard Henderson |
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Subject: |
[PULL 73/80] tcg/aarch64: Remove USE_GUEST_BASE |
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Date: |
Tue, 16 May 2023 12:41:38 -0700 |
Eliminate the test vs TARGET_LONG_BITS by considering this
predicate to be always true, and simplify accordingly.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.c.inc | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index cc0f55623b..8d78838796 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -85,11 +85,6 @@ bool have_lse2;
#define TCG_VEC_TMP0 TCG_REG_V31
#ifndef CONFIG_SOFTMMU
-/* Note that XZR cannot be encoded in the address base register slot,
- as that actaully encodes SP. So if we need to zero-extend the guest
- address, via the address index register slot, we need to load even
- a zero guest base into a register. */
-#define USE_GUEST_BASE (guest_base != 0 || TARGET_LONG_BITS == 32)
#define TCG_REG_GUEST_BASE TCG_REG_X28
#endif
@@ -1760,7 +1755,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0);
}
- if (USE_GUEST_BASE) {
+ if (guest_base || addr_type == TCG_TYPE_I32) {
h->base = TCG_REG_GUEST_BASE;
h->index = addr_reg;
h->index_ext = addr_type;
@@ -3172,10 +3167,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)
CPU_TEMP_BUF_NLONGS * sizeof(long));
#if !defined(CONFIG_SOFTMMU)
- if (USE_GUEST_BASE) {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base);
- tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
- }
+ /*
+ * Note that XZR cannot be encoded in the address base register slot,
+ * as that actaully encodes SP. Depending on the guest, we may need
+ * to zero-extend the guest address via the address index register slot,
+ * therefore we need to load even a zero guest base into a register.
+ */
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
#endif
tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
--
2.34.1
- [PULL 51/80] tcg/ppc: Support 128-bit load/store, (continued)
- [PULL 51/80] tcg/ppc: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 55/80] accel/tcg: Widen tcg-ldst.h addresses to uint64_t, Richard Henderson, 2023/05/16
- [PULL 54/80] tcg: Widen gen_insn_data to uint64_t, Richard Henderson, 2023/05/16
- [PULL 57/80] tcg: Widen helper_atomic_* addresses to uint64_t, Richard Henderson, 2023/05/16
- [PULL 59/80] accel/tcg: Merge gen_mem_wrapped with plugin_gen_empty_mem_callback, Richard Henderson, 2023/05/16
- [PULL 70/80] tcg/i386: Adjust type of tlb_mask, Richard Henderson, 2023/05/16
- [PULL 53/80] tcg: Split out memory ops to tcg-op-ldst.c, Richard Henderson, 2023/05/16
- [PULL 63/80] tcg: Add addr_type to TCGContext, Richard Henderson, 2023/05/16
- [PULL 66/80] tcg: Split INDEX_op_qemu_{ld, st}* for guest address size, Richard Henderson, 2023/05/16
- [PULL 72/80] tcg/arm: Remove TARGET_LONG_BITS, Richard Henderson, 2023/05/16
- [PULL 73/80] tcg/aarch64: Remove USE_GUEST_BASE,
Richard Henderson <=
- [PULL 76/80] tcg/mips: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 67/80] tcg/tci: Elimnate TARGET_LONG_BITS, target_ulong, Richard Henderson, 2023/05/16
- [PULL 78/80] tcg: Add page_bits and page_mask to TCGContext, Richard Henderson, 2023/05/16
- [PULL 77/80] tcg: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 60/80] accel/tcg: Merge do_gen_mem_cb into caller, Richard Henderson, 2023/05/16
- [PULL 62/80] accel/tcg: Widen plugin_gen_empty_mem_callback to i64, Richard Henderson, 2023/05/16
- [PULL 71/80] tcg/i386: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 69/80] tcg/i386: Conditionalize tcg_out_extu_i32_i64, Richard Henderson, 2023/05/16
- [PULL 75/80] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16