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[PULL 75/80] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL
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From: |
Richard Henderson |
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Subject: |
[PULL 75/80] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL |
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Date: |
Tue, 16 May 2023 12:41:40 -0700 |
All uses replaced with TCGContext.addr_type.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 0c4ef72d6f..e5f98845a0 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -844,6 +844,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
TCGReg addr_reg, MemOpIdx oi,
bool is_ld)
{
+ TCGType addr_type = s->addr_type;
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
MemOp a_bits;
@@ -874,7 +875,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
/* Load the tlb comparator and the addend. */
- tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_TMP0, TCG_REG_TMP2,
+ tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2,
is_ld ? offsetof(CPUTLBEntry, addr_read)
: offsetof(CPUTLBEntry, addr_write));
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2,
@@ -888,9 +889,9 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
if (a_bits < s_bits) {
unsigned a_mask = (1u << a_bits) - 1;
unsigned s_mask = (1u << s_bits) - 1;
- tcg_out_addi(s, TCG_TYPE_TL, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
+ tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
} else {
- tcg_out_mov(s, TCG_TYPE_TL, TCG_REG_TMP1, addr_reg);
+ tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg);
}
tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO,
a_bits, TARGET_PAGE_BITS - 1);
@@ -923,7 +924,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
h->index = USE_GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_ZERO;
#endif
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
h->base = TCG_REG_TMP0;
tcg_out_ext32u(s, h->base, addr_reg);
} else {
--
2.34.1
- [PULL 73/80] tcg/aarch64: Remove USE_GUEST_BASE, (continued)
- [PULL 73/80] tcg/aarch64: Remove USE_GUEST_BASE, Richard Henderson, 2023/05/16
- [PULL 76/80] tcg/mips: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 67/80] tcg/tci: Elimnate TARGET_LONG_BITS, target_ulong, Richard Henderson, 2023/05/16
- [PULL 78/80] tcg: Add page_bits and page_mask to TCGContext, Richard Henderson, 2023/05/16
- [PULL 77/80] tcg: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 60/80] accel/tcg: Merge do_gen_mem_cb into caller, Richard Henderson, 2023/05/16
- [PULL 62/80] accel/tcg: Widen plugin_gen_empty_mem_callback to i64, Richard Henderson, 2023/05/16
- [PULL 71/80] tcg/i386: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/05/16
- [PULL 69/80] tcg/i386: Conditionalize tcg_out_extu_i32_i64, Richard Henderson, 2023/05/16
- [PULL 75/80] tcg/loongarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL,
Richard Henderson <=
- [PULL 80/80] tcg: Split out exec/user/guest-base.h, Richard Henderson, 2023/05/16
- Re: [PULL 00/80] tcg patch queue, Peter Maydell, 2023/05/17