[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 01/29] sbsa-ref: switch default cpu core to Neoverse-N1
|
From: |
Peter Maydell |
|
Subject: |
[PULL 01/29] sbsa-ref: switch default cpu core to Neoverse-N1 |
|
Date: |
Thu, 18 May 2023 13:50:39 +0100 |
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
The world outside moves to newer and newer cpu cores. Let move SBSA
Reference Platform to something newer as well.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Message-id: 20230506183417.1360427-1-marcin.juszkiewicz@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/sbsa-ref.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 0b93558dde1..a1562f944a6 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -852,7 +852,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
mc->init = sbsa_ref_init;
mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine";
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a57");
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1");
mc->max_cpus = 512;
mc->pci_allow_0_address = true;
mc->minimum_page_bits = 12;
--
2.34.1
[PULL 08/29] target/arm: Create decodetree skeleton for A64, Peter Maydell, 2023/05/18
[PULL 07/29] target/arm: Split out disas_a64_legacy, Peter Maydell, 2023/05/18
[PULL 05/29] target/arm: add RAZ/WI handling for DBGDTR[TX|RX], Peter Maydell, 2023/05/18
[PULL 26/29] target/arm: Convert ERET, ERETAA, ERETAB to decodetree, Peter Maydell, 2023/05/18