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[PULL 09/29] target/arm: Pull calls to disas_sve() and disas_sme() out o
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From: |
Peter Maydell |
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Subject: |
[PULL 09/29] target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder |
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Date: |
Thu, 18 May 2023 13:50:47 +0100 |
The SVE and SME decode is already done by decodetree. Pull the calls
to these decoders out of the legacy decoder. This doesn't change
behaviour because all the patterns in sve.decode and sme.decode
already require the bits that the legacy decoder is decoding to have
the correct values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230512144106.3608981-4-peter.maydell@linaro.org
---
target/arm/tcg/translate-a64.c | 20 ++++----------------
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 7862e9dd4e3..1fd6f97b641 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -14205,19 +14205,6 @@ static bool btype_destination_ok(uint32_t insn, bool
bt, int btype)
static void disas_a64_legacy(DisasContext *s, uint32_t insn)
{
switch (extract32(insn, 25, 4)) {
- case 0x0:
- if (!extract32(insn, 31, 1) || !disas_sme(s, insn)) {
- unallocated_encoding(s);
- }
- break;
- case 0x1: case 0x3: /* UNALLOCATED */
- unallocated_encoding(s);
- break;
- case 0x2:
- if (!disas_sve(s, insn)) {
- unallocated_encoding(s);
- }
- break;
case 0x8: case 0x9: /* Data processing - immediate */
disas_data_proc_imm(s, insn);
break;
@@ -14239,7 +14226,7 @@ static void disas_a64_legacy(DisasContext *s, uint32_t
insn)
disas_data_proc_simd_fp(s, insn);
break;
default:
- assert(FALSE); /* all 15 cases should be handled above */
+ unallocated_encoding(s);
break;
}
}
@@ -14445,8 +14432,9 @@ static void aarch64_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
disas_sme_fa64(s, insn);
}
-
- if (!disas_a64(s, insn)) {
+ if (!disas_a64(s, insn) &&
+ !disas_sme(s, insn) &&
+ !disas_sve(s, insn)) {
disas_a64_legacy(s, insn);
}
--
2.34.1
- [PULL 00/29] target-arm queue, Peter Maydell, 2023/05/18
- [PULL 01/29] sbsa-ref: switch default cpu core to Neoverse-N1, Peter Maydell, 2023/05/18
- [PULL 04/29] arm/kvm: add support for MTE, Peter Maydell, 2023/05/18
- [PULL 08/29] target/arm: Create decodetree skeleton for A64, Peter Maydell, 2023/05/18
- [PULL 07/29] target/arm: Split out disas_a64_legacy, Peter Maydell, 2023/05/18
- [PULL 05/29] target/arm: add RAZ/WI handling for DBGDTR[TX|RX], Peter Maydell, 2023/05/18
- [PULL 26/29] target/arm: Convert ERET, ERETAA, ERETAB to decodetree, Peter Maydell, 2023/05/18
- [PULL 02/29] target/arm: Fix vd == vm overlap in sve_ldff1_z, Peter Maydell, 2023/05/18
- [PULL 03/29] Maintainers: add myself as reviewer for sbsa-ref, Peter Maydell, 2023/05/18
- [PULL 09/29] target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder,
Peter Maydell <=
- [PULL 10/29] target/arm: Convert PC-rel addressing to decodetree, Peter Maydell, 2023/05/18
- [PULL 11/29] target/arm: Split gen_add_CC and gen_sub_CC, Peter Maydell, 2023/05/18
- [PULL 15/29] target/arm: Convert Logical (immediate) to decodetree, Peter Maydell, 2023/05/18
- [PULL 06/29] sbsa-ref: use Bochs graphics card instead of VGA, Peter Maydell, 2023/05/18
- [PULL 28/29] hw/arm/vexpress: Avoid trivial memory leak of 'flashalias', Peter Maydell, 2023/05/18
- [PULL 20/29] target/arm: Convert CBZ, CBNZ to decodetree, Peter Maydell, 2023/05/18
- [PULL 17/29] target/arm: Convert Bitfield to decodetree, Peter Maydell, 2023/05/18
- [PULL 12/29] target/arm: Convert Add/subtract (immediate) to decodetree, Peter Maydell, 2023/05/18
- [PULL 25/29] target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree, Peter Maydell, 2023/05/18
- [PULL 22/29] target/arm: Convert conditional branch insns to decodetree, Peter Maydell, 2023/05/18