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[PULL 10/29] target/arm: Convert PC-rel addressing to decodetree
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From: |
Peter Maydell |
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Subject: |
[PULL 10/29] target/arm: Convert PC-rel addressing to decodetree |
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Date: |
Thu, 18 May 2023 13:50:48 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Convert the ADR and ADRP instructions.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230512144106.3608981-5-peter.maydell@linaro.org
[PMM: Rebased]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 13 ++++++++++++
target/arm/tcg/translate-a64.c | 38 +++++++++++++---------------------
2 files changed, 27 insertions(+), 24 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 43321bbbb05..bcf46fc37d7 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -18,3 +18,16 @@
#
# This file is processed by scripts/decodetree.py
#
+
+&ri rd imm
+
+
+### Data Processing - Immediate
+
+# PC-rel addressing
+
+%imm_pcrel 5:s19 29:2
+@pcrel . .. ..... ................... rd:5 &ri imm=%imm_pcrel
+
+ADR 0 .. 10000 ................... ..... @pcrel
+ADRP 1 .. 10000 ................... ..... @pcrel
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 1fd6f97b641..ffcd05eb38a 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -4179,31 +4179,24 @@ static void disas_ldst(DisasContext *s, uint32_t insn)
}
}
-/* PC-rel. addressing
- * 31 30 29 28 24 23 5 4 0
- * +----+-------+-----------+-------------------+------+
- * | op | immlo | 1 0 0 0 0 | immhi | Rd |
- * +----+-------+-----------+-------------------+------+
+/*
+ * PC-rel. addressing
*/
-static void disas_pc_rel_adr(DisasContext *s, uint32_t insn)
+
+static bool trans_ADR(DisasContext *s, arg_ri *a)
{
- unsigned int page, rd;
- int64_t offset;
+ gen_pc_plus_diff(s, cpu_reg(s, a->rd), a->imm);
+ return true;
+}
- page = extract32(insn, 31, 1);
- /* SignExtend(immhi:immlo) -> offset */
- offset = sextract64(insn, 5, 19);
- offset = offset << 2 | extract32(insn, 29, 2);
- rd = extract32(insn, 0, 5);
+static bool trans_ADRP(DisasContext *s, arg_ri *a)
+{
+ int64_t offset = (int64_t)a->imm << 12;
- if (page) {
- /* ADRP (page based) */
- offset <<= 12;
- /* The page offset is ok for CF_PCREL. */
- offset -= s->pc_curr & 0xfff;
- }
-
- gen_pc_plus_diff(s, cpu_reg(s, rd), offset);
+ /* The page offset is ok for CF_PCREL. */
+ offset -= s->pc_curr & 0xfff;
+ gen_pc_plus_diff(s, cpu_reg(s, a->rd), offset);
+ return true;
}
/*
@@ -4656,9 +4649,6 @@ static void disas_extract(DisasContext *s, uint32_t insn)
static void disas_data_proc_imm(DisasContext *s, uint32_t insn)
{
switch (extract32(insn, 23, 6)) {
- case 0x20: case 0x21: /* PC-rel. addressing */
- disas_pc_rel_adr(s, insn);
- break;
case 0x22: /* Add/subtract (immediate) */
disas_add_sub_imm(s, insn);
break;
--
2.34.1
- [PULL 00/29] target-arm queue, Peter Maydell, 2023/05/18
- [PULL 01/29] sbsa-ref: switch default cpu core to Neoverse-N1, Peter Maydell, 2023/05/18
- [PULL 04/29] arm/kvm: add support for MTE, Peter Maydell, 2023/05/18
- [PULL 08/29] target/arm: Create decodetree skeleton for A64, Peter Maydell, 2023/05/18
- [PULL 07/29] target/arm: Split out disas_a64_legacy, Peter Maydell, 2023/05/18
- [PULL 05/29] target/arm: add RAZ/WI handling for DBGDTR[TX|RX], Peter Maydell, 2023/05/18
- [PULL 26/29] target/arm: Convert ERET, ERETAA, ERETAB to decodetree, Peter Maydell, 2023/05/18
- [PULL 02/29] target/arm: Fix vd == vm overlap in sve_ldff1_z, Peter Maydell, 2023/05/18
- [PULL 03/29] Maintainers: add myself as reviewer for sbsa-ref, Peter Maydell, 2023/05/18
- [PULL 09/29] target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder, Peter Maydell, 2023/05/18
- [PULL 10/29] target/arm: Convert PC-rel addressing to decodetree,
Peter Maydell <=
- [PULL 11/29] target/arm: Split gen_add_CC and gen_sub_CC, Peter Maydell, 2023/05/18
- [PULL 15/29] target/arm: Convert Logical (immediate) to decodetree, Peter Maydell, 2023/05/18
- [PULL 06/29] sbsa-ref: use Bochs graphics card instead of VGA, Peter Maydell, 2023/05/18
- [PULL 28/29] hw/arm/vexpress: Avoid trivial memory leak of 'flashalias', Peter Maydell, 2023/05/18
- [PULL 20/29] target/arm: Convert CBZ, CBNZ to decodetree, Peter Maydell, 2023/05/18
- [PULL 17/29] target/arm: Convert Bitfield to decodetree, Peter Maydell, 2023/05/18
- [PULL 12/29] target/arm: Convert Add/subtract (immediate) to decodetree, Peter Maydell, 2023/05/18
- [PULL 25/29] target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree, Peter Maydell, 2023/05/18
- [PULL 22/29] target/arm: Convert conditional branch insns to decodetree, Peter Maydell, 2023/05/18
- [PULL 19/29] target/arm: Convert unconditional branch immediate to decodetree, Peter Maydell, 2023/05/18