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[PULL 36/40] hw/pci-bridge: make building pcie-to-pci bridge configurabl
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From: |
Michael S. Tsirkin |
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Subject: |
[PULL 36/40] hw/pci-bridge: make building pcie-to-pci bridge configurable |
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Date: |
Fri, 19 May 2023 10:52:47 -0400 |
From: Sebastian Ott <sebott@redhat.com>
Introduce a CONFIG option to build the pcie-to-pci bridge. No
functional change since it's enabled per default for PCIE_PORT=y.
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Message-Id: <72b6599d-6b27-00b5-aac5-2ebc16a2e023@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci-bridge/Kconfig | 5 +++++
hw/pci-bridge/meson.build | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/pci-bridge/Kconfig b/hw/pci-bridge/Kconfig
index 02614f49aa..67077366cc 100644
--- a/hw/pci-bridge/Kconfig
+++ b/hw/pci-bridge/Kconfig
@@ -3,6 +3,11 @@ config PCIE_PORT
default y if PCI_DEVICES
depends on PCI_EXPRESS && MSI_NONBROKEN
+config PCIE_PCI_BRIDGE
+ bool
+ default y if PCIE_PORT
+ depends on PCIE_PORT
+
config PXB
bool
default y if Q35 || ARM_VIRT
diff --git a/hw/pci-bridge/meson.build b/hw/pci-bridge/meson.build
index fe92d43de6..0edc6c7cbf 100644
--- a/hw/pci-bridge/meson.build
+++ b/hw/pci-bridge/meson.build
@@ -2,7 +2,8 @@ pci_ss = ss.source_set()
pci_ss.add(files('pci_bridge_dev.c'))
pci_ss.add(when: 'CONFIG_I82801B11', if_true: files('i82801b11.c'))
pci_ss.add(when: 'CONFIG_IOH3420', if_true: files('ioh3420.c'))
-pci_ss.add(when: 'CONFIG_PCIE_PORT', if_true: files('pcie_root_port.c',
'gen_pcie_root_port.c', 'pcie_pci_bridge.c'))
+pci_ss.add(when: 'CONFIG_PCIE_PORT', if_true: files('pcie_root_port.c',
'gen_pcie_root_port.c'))
+pci_ss.add(when: 'CONFIG_PCIE_PCI_BRIDGE', if_true: files('pcie_pci_bridge.c'))
pci_ss.add(when: 'CONFIG_PXB', if_true: files('pci_expander_bridge.c'),
if_false: files('pci_expander_bridge_stubs.c'))
pci_ss.add(when: 'CONFIG_XIO3130', if_true: files('xio3130_upstream.c',
'xio3130_downstream.c'))
--
MST
- [PULL 15/40] ACPI: bios-tables-test.c step 5 (update expected table binaries), (continued)
- [PULL 15/40] ACPI: bios-tables-test.c step 5 (update expected table binaries), Michael S. Tsirkin, 2023/05/19
- [PULL 29/40] hw/pci-host/q35: Inline sysbus_add_io(), Michael S. Tsirkin, 2023/05/19
- [PULL 25/40] vhost_vdpa: fix the input in trace_vhost_vdpa_listener_region_del(), Michael S. Tsirkin, 2023/05/19
- [PULL 28/40] hw/pci-host/i440fx: Inline sysbus_add_io(), Michael S. Tsirkin, 2023/05/19
- [PULL 27/40] vhost-vdpa: Add support for vIOMMU., Michael S. Tsirkin, 2023/05/19
- [PULL 30/40] hw/i386/pc_q35: Reuse machine parameter, Michael S. Tsirkin, 2023/05/19
- [PULL 31/40] hw/i386/pc_{q35,piix}: Reuse MachineClass::desc as SMB product name, Michael S. Tsirkin, 2023/05/19
- [PULL 32/40] hw/i386/pc_{q35,piix}: Minimize usage of get_system_memory(), Michael S. Tsirkin, 2023/05/19
- [PULL 33/40] hw/i386/pc: Initialize ram_memory variable directly, Michael S. Tsirkin, 2023/05/19
- [PULL 34/40] hw/pci-host/pam: Make init_pam() usage more readable, Michael S. Tsirkin, 2023/05/19
- [PULL 36/40] hw/pci-bridge: make building pcie-to-pci bridge configurable,
Michael S. Tsirkin <=
- [PULL 35/40] virtio-pci: add handling of PCI ATS and Device-TLB enable/disable, Michael S. Tsirkin, 2023/05/19
- [PULL 37/40] hw/cxl: rename mailbox return code type from ret_code to CXLRetCode, Michael S. Tsirkin, 2023/05/19
- [PULL 38/40] hw/cxl: Introduce cxl_device_get_timestamp() utility function, Michael S. Tsirkin, 2023/05/19
- [PULL 39/40] hw/i386/pc: Create RTC controllers in south bridges, Michael S. Tsirkin, 2023/05/19
- [PULL 40/40] hw/i386/pc: No need for rtc_state to be an out-parameter, Michael S. Tsirkin, 2023/05/19
- Re: [PULL 00/40] virtio,pc,pci: fixes, features, cleanups, Richard Henderson, 2023/05/19