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[PATCH 23/30] mac_via: fix rtc command decoding for the PRAM seconds reg
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From: |
Mark Cave-Ayland |
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Subject: |
[PATCH 23/30] mac_via: fix rtc command decoding for the PRAM seconds registers |
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Date: |
Wed, 24 May 2023 22:10:57 +0100 |
Analysis of the MacOS toolbox ROM code shows that on startup it attempts 2
separate reads of the seconds registers with commands 0x9d...0x91 followed by
0x8d..0x81 without resetting the command to its initial value. The PRAM seconds
value is only accepted when the values of the 2 separate reads match.
>From this we conclude that bit 4 of the rtc command is not decoded or we don't
care about its value when reading the PRAM seconds registers. Implement this
decoding change so that both reads return successfully which allows the MacOS
toolbox ROM to correctly set the date/time.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/misc/mac_via.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
index d7067030db..5d5334b0f6 100644
--- a/hw/misc/mac_via.c
+++ b/hw/misc/mac_via.c
@@ -366,10 +366,10 @@ static void pram_update(MOS6522Q800VIA1State *v1s)
*
* Command byte Register addressed by the command
*
- * z0000001 Seconds register 0 (lowest-order byte)
- * z0000101 Seconds register 1
- * z0001001 Seconds register 2
- * z0001101 Seconds register 3 (highest-order byte)
+ * z00x0001 Seconds register 0 (lowest-order byte)
+ * z00x0101 Seconds register 1
+ * z00x1001 Seconds register 2
+ * z00x1101 Seconds register 3 (highest-order byte)
* 00110001 Test register (write-only)
* 00110101 Write-Protect Register (write-only)
* z010aa01 RAM address 100aa ($10-$13) (first 20 bytes only)
@@ -377,6 +377,7 @@ static void pram_update(MOS6522Q800VIA1State *v1s)
* z0111aaa Extended memory designator and sector number
*
* For a read request, z=1, for a write z=0
+ * The letter x indicates don't care
* The letter a indicates bits whose value depend on what parameter
* RAM byte you want to address
*/
@@ -393,7 +394,7 @@ static int via1_rtc_compact_cmd(uint8_t value)
}
if ((value & 0x03) == 0x01) {
value >>= 2;
- if ((value & 0x1c) == 0) {
+ if ((value & 0x18) == 0) {
/* seconds registers */
return read | (REG_0 + (value & 0x03));
} else if ((value == 0x0c) && !read) {
--
2.30.2
- Re: [PATCH 15/30] asc: generate silence if FIFO empty but engine still running, (continued)
- [PATCH 17/30] q800: add easc bool machine class property to switch between ASC and EASC, Mark Cave-Ayland, 2023/05/24
- [PATCH 19/30] swim: split into separate IWM and ISM register blocks, Mark Cave-Ayland, 2023/05/24
- [PATCH 18/30] swim: add trace events for IWM and ISM registers, Mark Cave-Ayland, 2023/05/24
- [PATCH 22/30] mac_via: fix rtc command decoding from PRAM addresses 0x0 to 0xf, Mark Cave-Ayland, 2023/05/24
- [PATCH 21/30] mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK, Mark Cave-Ayland, 2023/05/24
- [PATCH 23/30] mac_via: fix rtc command decoding for the PRAM seconds registers,
Mark Cave-Ayland <=
- [PATCH 20/30] swim: update IWM/ISM register block decoding, Mark Cave-Ayland, 2023/05/24
- [PATCH 24/30] mac_via: workaround NetBSD ADB bus enumeration issue, Mark Cave-Ayland, 2023/05/24
- [PATCH 25/30] mac_via: implement ADB_STATE_IDLE state if shift register in input mode, Mark Cave-Ayland, 2023/05/24
- [PATCH 16/30] q800: add Apple Sound Chip (ASC) audio to machine, Mark Cave-Ayland, 2023/05/24
- [PATCH 27/30] q800: add ESCC alias at 0xc000, Mark Cave-Ayland, 2023/05/24
- [PATCH 28/30] q800: add alias for MacOS toolbox ROM at 0x40000000, Mark Cave-Ayland, 2023/05/24
- [PATCH 26/30] mac_via: always clear ADB interrupt when switching to A/UX mode, Mark Cave-Ayland, 2023/05/24
- [PATCH 29/30] mac_via: extend timer calibration hack to work with A/UX, Mark Cave-Ayland, 2023/05/24
- [PATCH 30/30] mac_via: work around QEMU unaligned MMIO access bug, Mark Cave-Ayland, 2023/05/24