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[PULL 08/23] tcg/mips: Aggressively use the constant pool for n64 calls
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From: |
Richard Henderson |
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Subject: |
[PULL 08/23] tcg/mips: Aggressively use the constant pool for n64 calls |
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Date: |
Thu, 25 May 2023 11:10:21 -0700 |
Repeated calls to a single helper are common -- especially
the ones for softmmu memory access. Prefer the constant pool
to longer sequences to increase sharing.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/mips/tcg-target.c.inc | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 3b840ecc4c..068deab8c9 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -1101,9 +1101,19 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond,
TCGReg ret,
static void tcg_out_call_int(TCGContext *s, const tcg_insn_unit *arg, bool
tail)
{
- /* Note that the ABI requires the called function's address to be
- loaded into T9, even if a direct branch is in range. */
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T9, (uintptr_t)arg);
+ /*
+ * Note that __mips_abicalls requires the called function's address
+ * to be loaded into $25 (t9), even if a direct branch is in range.
+ *
+ * For n64, always drop the pointer into the constant pool.
+ * We can re-use helper addresses often and do not want any
+ * of the longer sequences tcg_out_movi may try.
+ */
+ if (sizeof(uintptr_t) == 8) {
+ tcg_out_movi_pool(s, TCG_REG_T9, (uintptr_t)arg, TCG_REG_TB);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T9, (uintptr_t)arg);
+ }
/* But do try a direct branch, allowing the cpu better insn prefetch. */
if (tail) {
--
2.34.1
- [PULL 00/23] tcg patch queue, Richard Henderson, 2023/05/25
- [PULL 01/23] tcg/mips: Move TCG_AREG0 to S8, Richard Henderson, 2023/05/25
- [PULL 03/23] tcg/mips: Unify TCG_GUEST_BASE_REG tests, Richard Henderson, 2023/05/25
- [PULL 02/23] tcg/mips: Move TCG_GUEST_BASE_REG to S7, Richard Henderson, 2023/05/25
- [PULL 04/23] tcg/mips: Create and use TCG_REG_TB, Richard Henderson, 2023/05/25
- [PULL 06/23] tcg/mips: Split out tcg_out_movi_two, Richard Henderson, 2023/05/25
- [PULL 05/23] tcg/mips: Split out tcg_out_movi_one, Richard Henderson, 2023/05/25
- [PULL 07/23] tcg/mips: Use the constant pool for 64-bit constants, Richard Henderson, 2023/05/25
- [PULL 08/23] tcg/mips: Aggressively use the constant pool for n64 calls,
Richard Henderson <=
- [PULL 09/23] tcg/mips: Try tb-relative addresses in tcg_out_movi, Richard Henderson, 2023/05/25
- [PULL 10/23] tcg/mips: Try three insns with shift and add in tcg_out_movi, Richard Henderson, 2023/05/25
- [PULL 11/23] tcg/mips: Use qemu_build_not_reached for LO/HI_OFF, Richard Henderson, 2023/05/25
- [PULL 12/23] tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN, Richard Henderson, 2023/05/25
- [PULL 13/23] disas/riscv: Decode czero.{eqz,nez}, Richard Henderson, 2023/05/25
- [PULL 15/23] tcg/riscv: Support ANDN, ORN, XNOR from Zbb, Richard Henderson, 2023/05/25
- [PULL 14/23] tcg/riscv: Probe for Zba, Zbb, Zicond extensions, Richard Henderson, 2023/05/25
- [PULL 16/23] tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb, Richard Henderson, 2023/05/25
- [PULL 17/23] tcg/riscv: Use ADD.UW for guest address generation, Richard Henderson, 2023/05/25
- [PULL 18/23] tcg/riscv: Support rotates from Zbb, Richard Henderson, 2023/05/25