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[PULL 14/27] accel/tcg: Add x86_64 load_atom_extract_al16_or_al8
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From: |
Richard Henderson |
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Subject: |
[PULL 14/27] accel/tcg: Add x86_64 load_atom_extract_al16_or_al8 |
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Date: |
Tue, 30 May 2023 11:59:36 -0700 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
.../x86_64/host/load-extract-al16-al8.h | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 host/include/x86_64/host/load-extract-al16-al8.h
diff --git a/host/include/x86_64/host/load-extract-al16-al8.h
b/host/include/x86_64/host/load-extract-al16-al8.h
new file mode 100644
index 0000000000..31b6fe8c45
--- /dev/null
+++ b/host/include/x86_64/host/load-extract-al16-al8.h
@@ -0,0 +1,50 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * Atomic extract 64 from 128-bit, x86_64 version.
+ *
+ * Copyright (C) 2023 Linaro, Ltd.
+ */
+
+#ifndef X86_64_LOAD_EXTRACT_AL16_AL8_H
+#define X86_64_LOAD_EXTRACT_AL16_AL8_H
+
+#ifdef CONFIG_INT128_TYPE
+#include "host/cpuinfo.h"
+
+/**
+ * load_atom_extract_al16_or_al8:
+ * @pv: host address
+ * @s: object size in bytes, @s <= 8.
+ *
+ * Load @s bytes from @pv, when pv % s != 0. If [p, p+s-1] does not
+ * cross an 16-byte boundary then the access must be 16-byte atomic,
+ * otherwise the access must be 8-byte atomic.
+ */
+static inline uint64_t ATTRIBUTE_ATOMIC128_OPT
+load_atom_extract_al16_or_al8(void *pv, int s)
+{
+ uintptr_t pi = (uintptr_t)pv;
+ __int128_t *ptr_align = (__int128_t *)(pi & ~7);
+ int shr = (pi & 7) * 8;
+ Int128Alias r;
+
+ /*
+ * ptr_align % 16 is now only 0 or 8.
+ * If the host supports atomic loads with VMOVDQU, then always use that,
+ * making the branch highly predictable. Otherwise we must use VMOVDQA
+ * when ptr_align % 16 == 0 for 16-byte atomicity.
+ */
+ if ((cpuinfo & CPUINFO_ATOMIC_VMOVDQU) || (pi & 8)) {
+ asm("vmovdqu %1, %0" : "=x" (r.i) : "m" (*ptr_align));
+ } else {
+ asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr_align));
+ }
+ return int128_getlo(int128_urshift(r.s, shr));
+}
+#else
+/* Fallback definition that must be optimized away, or error. */
+uint64_t QEMU_ERROR("unsupported atomic")
+ load_atom_extract_al16_or_al8(void *pv, int s);
+#endif
+
+#endif /* X86_64_LOAD_EXTRACT_AL16_AL8_H */
--
2.34.1
- [PULL 00/27] tcg patch queue, Richard Henderson, 2023/05/30
- [PULL 01/27] tcg: Fix register move type in tcg_out_ld_helper_ret, Richard Henderson, 2023/05/30
- [PULL 06/27] tcg/aarch64: Rename temporaries, Richard Henderson, 2023/05/30
- [PULL 03/27] meson: Split test for __int128_t type from __int128_t arithmetic, Richard Henderson, 2023/05/30
- [PULL 02/27] accel/tcg: Fix check for page writeability in load_atomic16_or_exit, Richard Henderson, 2023/05/30
- [PULL 04/27] qemu/atomic128: Add x86_64 atomic128-ldst.h, Richard Henderson, 2023/05/30
- [PULL 14/27] accel/tcg: Add x86_64 load_atom_extract_al16_or_al8,
Richard Henderson <=
- [PULL 17/27] tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS, Richard Henderson, 2023/05/30
- [PULL 21/27] decodetree: Do not remove output_file from /dev, Richard Henderson, 2023/05/30
- [PULL 22/27] tests/decode: Convert tests to meson, Richard Henderson, 2023/05/30
- [PULL 24/27] scripts/decodetree: Pass lvalue-formatter function to str_extract(), Richard Henderson, 2023/05/30
- [PULL 13/27] accel/tcg: Extract store_atom_insert_al16 to host header, Richard Henderson, 2023/05/30
- [PULL 18/27] decodetree: Add --test-for-error, Richard Henderson, 2023/05/30
- [PULL 15/27] accel/tcg: Add aarch64 lse2 load_atom_extract_al16_or_al8, Richard Henderson, 2023/05/30
- [PULL 19/27] decodetree: Fix recursion in prop_format and build_tree, Richard Henderson, 2023/05/30
- [PULL 27/27] tests/decode: Add tests for various named-field cases, Richard Henderson, 2023/05/30
- [PULL 26/27] scripts/decodetree: Implement named field support, Richard Henderson, 2023/05/30