While it's not exactly standard practice to modify root port device
capabilities runtime, it also does not seem to be precluded by the PCIe
Spec (6.0.1). The Atomic Op completion bits of the DEVCAP2 register
are defined as Read-only:
7.4 Configuration Register Types
Read-only - Register bits are read-only and cannot be altered by software.
Where explicitly defined, these bits are used to reflect changing
hardware state, and as a result bit values can be observed to
change at run time. Register bit default values and bits that
cannot change value at run time, are permitted to be hard-coded,
initialized by system/device firmware, or initialized by hardware
mechanisms such as pin strapping or nonvolatile storage.
Initialization by system firmware is permitted only for system-
integrated devices. If the optional feature that would Set the
bits is not implemented, the bits must be hardwired to Zero.
Here "altered by software" is relative to guest writes to the config
space register, whereas in this implementation we're acting as hardware
and the bits are changing to reflect a change in runtime capabilities.
The spec does include a HwInit register type which would restrict the
value from changing at runtime outside of resets. Therefore while it
would not be advised to update these bits arbitrarily, it does seem safe
and compatible with guest software to update the value on device attach
and detach.