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[PATCH v6 05/12] target/riscv/cpu.c: split vendor exts from riscv_cpu_ex
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From: |
Daniel Henrique Barboza |
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Subject: |
[PATCH v6 05/12] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[] |
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Date: |
Thu, 27 Jul 2023 19:09:20 -0300 |
Our goal is to make riscv_cpu_extensions[] hold only ratified,
non-vendor extensions.
Create a new riscv_cpu_vendor_exts[] array for them, changing
riscv_cpu_add_user_properties() and riscv_cpu_add_kvm_properties()
accordingly.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 37 +++++++++++++++++++++++--------------
1 file changed, 23 insertions(+), 14 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 33a2e9328c..c8e1de68d3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1814,20 +1814,6 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("zcmp", RISCVCPU, cfg.ext_zcmp, false),
DEFINE_PROP_BOOL("zcmt", RISCVCPU, cfg.ext_zcmt, false),
- /* Vendor-specific custom extensions */
- DEFINE_PROP_BOOL("xtheadba", RISCVCPU, cfg.ext_xtheadba, false),
- DEFINE_PROP_BOOL("xtheadbb", RISCVCPU, cfg.ext_xtheadbb, false),
- DEFINE_PROP_BOOL("xtheadbs", RISCVCPU, cfg.ext_xtheadbs, false),
- DEFINE_PROP_BOOL("xtheadcmo", RISCVCPU, cfg.ext_xtheadcmo, false),
- DEFINE_PROP_BOOL("xtheadcondmov", RISCVCPU, cfg.ext_xtheadcondmov, false),
- DEFINE_PROP_BOOL("xtheadfmemidx", RISCVCPU, cfg.ext_xtheadfmemidx, false),
- DEFINE_PROP_BOOL("xtheadfmv", RISCVCPU, cfg.ext_xtheadfmv, false),
- DEFINE_PROP_BOOL("xtheadmac", RISCVCPU, cfg.ext_xtheadmac, false),
- DEFINE_PROP_BOOL("xtheadmemidx", RISCVCPU, cfg.ext_xtheadmemidx, false),
- DEFINE_PROP_BOOL("xtheadmempair", RISCVCPU, cfg.ext_xtheadmempair, false),
- DEFINE_PROP_BOOL("xtheadsync", RISCVCPU, cfg.ext_xtheadsync, false),
- DEFINE_PROP_BOOL("xventanacondops", RISCVCPU, cfg.ext_XVentanaCondOps,
false),
-
/* These are experimental so mark with 'x-' */
DEFINE_PROP_BOOL("x-zicond", RISCVCPU, cfg.ext_zicond, false),
@@ -1844,6 +1830,21 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("x-zvfbfwma", RISCVCPU, cfg.ext_zvfbfwma, false),
};
+static Property riscv_cpu_vendor_exts[] = {
+ DEFINE_PROP_BOOL("xtheadba", RISCVCPU, cfg.ext_xtheadba, false),
+ DEFINE_PROP_BOOL("xtheadbb", RISCVCPU, cfg.ext_xtheadbb, false),
+ DEFINE_PROP_BOOL("xtheadbs", RISCVCPU, cfg.ext_xtheadbs, false),
+ DEFINE_PROP_BOOL("xtheadcmo", RISCVCPU, cfg.ext_xtheadcmo, false),
+ DEFINE_PROP_BOOL("xtheadcondmov", RISCVCPU, cfg.ext_xtheadcondmov, false),
+ DEFINE_PROP_BOOL("xtheadfmemidx", RISCVCPU, cfg.ext_xtheadfmemidx, false),
+ DEFINE_PROP_BOOL("xtheadfmv", RISCVCPU, cfg.ext_xtheadfmv, false),
+ DEFINE_PROP_BOOL("xtheadmac", RISCVCPU, cfg.ext_xtheadmac, false),
+ DEFINE_PROP_BOOL("xtheadmemidx", RISCVCPU, cfg.ext_xtheadmemidx, false),
+ DEFINE_PROP_BOOL("xtheadmempair", RISCVCPU, cfg.ext_xtheadmempair, false),
+ DEFINE_PROP_BOOL("xtheadsync", RISCVCPU, cfg.ext_xtheadsync, false),
+ DEFINE_PROP_BOOL("xventanacondops", RISCVCPU, cfg.ext_XVentanaCondOps,
false),
+};
+
static Property riscv_cpu_options[] = {
DEFINE_PROP_UINT8("pmu-num", RISCVCPU, cfg.pmu_num, 16),
@@ -1908,6 +1909,10 @@ static void riscv_cpu_add_kvm_properties(Object *obj)
riscv_cpu_add_kvm_unavail_prop(obj, riscv_cpu_extensions[i].name);
}
+ for (int i = 0; i < ARRAY_SIZE(riscv_cpu_vendor_exts); i++) {
+ riscv_cpu_add_kvm_unavail_prop(obj, riscv_cpu_vendor_exts[i].name);
+ }
+
for (int i = 0; i < ARRAY_SIZE(riscv_cpu_options); i++) {
/* Check if KVM created the property already */
if (object_property_find(obj, riscv_cpu_options[i].name)) {
@@ -1946,6 +1951,10 @@ static void riscv_cpu_add_user_properties(Object *obj)
for (int i = 0; i < ARRAY_SIZE(riscv_cpu_options); i++) {
qdev_property_add_static(dev, &riscv_cpu_options[i]);
}
+
+ for (int i = 0; i < ARRAY_SIZE(riscv_cpu_vendor_exts); i++) {
+ qdev_property_add_static(dev, &riscv_cpu_vendor_exts[i]);
+ }
}
static Property riscv_cpu_properties[] = {
--
2.41.0
- [PATCH v6 00/12] riscv: add 'max' CPU, deprecate 'any', Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 01/12] target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 02/12] target/riscv/cpu.c: skip 'bool' check when filtering KVM props, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 03/12] target/riscv/cpu.c: split kvm prop handling to its own helper, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 04/12] target/riscv/cpu.c: del DEFINE_PROP_END_OF_LIST() from riscv_cpu_extensions, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 05/12] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[],
Daniel Henrique Barboza <=
- [PATCH v6 06/12] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 07/12] target/riscv/cpu.c: add ADD_CPU_QDEV_PROPERTIES_ARRAY() macro, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 08/12] target/riscv/cpu.c: add ADD_UNAVAIL_KVM_PROP_ARRAY() macro, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 09/12] target/riscv/cpu.c: limit cfg->vext_spec log message, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 10/12] target/riscv: add 'max' CPU type, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 11/12] avocado, risc-v: add opensbi tests for 'max' CPU, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 12/12] target/riscv: deprecate the 'any' CPU type, Daniel Henrique Barboza, 2023/07/27