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Re: [PATCH v3 01/17] i386: Fix comment style in topology.h
From: |
Moger, Babu |
Subject: |
Re: [PATCH v3 01/17] i386: Fix comment style in topology.h |
Date: |
Tue, 1 Aug 2023 18:13:55 -0500 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 |
Hi Zhao,
On 8/1/23 05:35, Zhao Liu wrote:
> From: Zhao Liu <zhao1.liu@intel.com>
>
> For function comments in this file, keep the comment style consistent
> with other places.
s/with other places./with other files in the directory./
>
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org
> Reviewed-by: Yanan Wang <wangyanan55@huawei.com>
> Acked-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> include/hw/i386/topology.h | 33 +++++++++++++++++----------------
> 1 file changed, 17 insertions(+), 16 deletions(-)
>
> diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
> index 81573f6cfde0..5a19679f618b 100644
> --- a/include/hw/i386/topology.h
> +++ b/include/hw/i386/topology.h
> @@ -24,7 +24,8 @@
> #ifndef HW_I386_TOPOLOGY_H
> #define HW_I386_TOPOLOGY_H
>
> -/* This file implements the APIC-ID-based CPU topology enumeration logic,
> +/*
> + * This file implements the APIC-ID-based CPU topology enumeration logic,
> * documented at the following document:
> * Intel® 64 Architecture Processor Topology Enumeration
> *
> http://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration/
> @@ -41,7 +42,8 @@
>
> #include "qemu/bitops.h"
>
> -/* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support
> +/*
> + * APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support
> */
> typedef uint32_t apic_id_t;
>
> @@ -58,8 +60,7 @@ typedef struct X86CPUTopoInfo {
> unsigned threads_per_core;
> } X86CPUTopoInfo;
>
> -/* Return the bit width needed for 'count' IDs
> - */
> +/* Return the bit width needed for 'count' IDs */
> static unsigned apicid_bitwidth_for_count(unsigned count)
> {
> g_assert(count >= 1);
> @@ -67,15 +68,13 @@ static unsigned apicid_bitwidth_for_count(unsigned count)
> return count ? 32 - clz32(count) : 0;
> }
>
> -/* Bit width of the SMT_ID (thread ID) field on the APIC ID
> - */
> +/* Bit width of the SMT_ID (thread ID) field on the APIC ID */
> static inline unsigned apicid_smt_width(X86CPUTopoInfo *topo_info)
> {
> return apicid_bitwidth_for_count(topo_info->threads_per_core);
> }
>
> -/* Bit width of the Core_ID field
> - */
> +/* Bit width of the Core_ID field */
> static inline unsigned apicid_core_width(X86CPUTopoInfo *topo_info)
> {
> return apicid_bitwidth_for_count(topo_info->cores_per_die);
> @@ -87,8 +86,7 @@ static inline unsigned apicid_die_width(X86CPUTopoInfo
> *topo_info)
> return apicid_bitwidth_for_count(topo_info->dies_per_pkg);
> }
>
> -/* Bit offset of the Core_ID field
> - */
> +/* Bit offset of the Core_ID field */
> static inline unsigned apicid_core_offset(X86CPUTopoInfo *topo_info)
> {
> return apicid_smt_width(topo_info);
> @@ -100,14 +98,14 @@ static inline unsigned apicid_die_offset(X86CPUTopoInfo
> *topo_info)
> return apicid_core_offset(topo_info) + apicid_core_width(topo_info);
> }
>
> -/* Bit offset of the Pkg_ID (socket ID) field
> - */
> +/* Bit offset of the Pkg_ID (socket ID) field */
> static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info)
> {
> return apicid_die_offset(topo_info) + apicid_die_width(topo_info);
> }
>
> -/* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
> +/*
> + * Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
> *
> * The caller must make sure core_id < nr_cores and smt_id < nr_threads.
> */
> @@ -120,7 +118,8 @@ static inline apic_id_t
> x86_apicid_from_topo_ids(X86CPUTopoInfo *topo_info,
> topo_ids->smt_id;
> }
>
> -/* Calculate thread/core/package IDs for a specific topology,
> +/*
> + * Calculate thread/core/package IDs for a specific topology,
> * based on (contiguous) CPU index
> */
> static inline void x86_topo_ids_from_idx(X86CPUTopoInfo *topo_info,
> @@ -137,7 +136,8 @@ static inline void x86_topo_ids_from_idx(X86CPUTopoInfo
> *topo_info,
> topo_ids->smt_id = cpu_index % nr_threads;
> }
>
> -/* Calculate thread/core/package IDs for a specific topology,
> +/*
> + * Calculate thread/core/package IDs for a specific topology,
> * based on APIC ID
> */
> static inline void x86_topo_ids_from_apicid(apic_id_t apicid,
> @@ -155,7 +155,8 @@ static inline void x86_topo_ids_from_apicid(apic_id_t
> apicid,
> topo_ids->pkg_id = apicid >> apicid_pkg_offset(topo_info);
> }
>
> -/* Make APIC ID for the CPU 'cpu_index'
> +/*
> + * Make APIC ID for the CPU 'cpu_index'
> *
> * 'cpu_index' is a sequential, contiguous ID for the CPU.
> */
--
Thanks
Babu Moger